Correlation between process node, transistor count and die size.

[Frontino]

AMD's disclosure on the actual transistor count of Tahiti to the single digit (https://twitter.com/AMDRadeon/status/362596332449439745) made me try to come with my own calculated transistor count of all the other 28 nm dies, even NVIDIA's.
Some came quite close, others many hundreds off.
Hawaii is the most trivial: if I start from the 6.2 B I get 500 mm2, if I start from the 438 mm2 I get 5.4 billions transistors and if I consider both 6.2 and 438 valid, Tahiti shrinks to 300 mm2.
Is it because official die sizes are inaccurate or there's actually no direct correlation between die size and transistor count?

 

[AlNom]

Density can also vary depending on the logic complexity e.g. caches are typically much denser.

 

[Alexko]

And the proportion of I/O to logic/memory, plus the characteristics of I/O PHYs. Hawaii has slower, denser memory PHYs than Tahiti.

Density is also a function of physical design, which tends to get a little better as IHVs gain experience with a particular process. Hawaii is about 2 years younger than Tahiti, so that's a factor too.

 

[dananorma]

Density can also vary depending on the logic complexity e.g. caches are typically much denser.

great!