Beyond2.5D Stacking, Interposer, lego

DieH@rd

Legend
Is that a smart design.?

Using an ARM CPU for OS on the background while the CPU is completely use for gaming.?

Could this be a possibility.?

I wonder how much Sony pays for Vita SoC package [A9 Arm SoC+128mb wideIO vram+2x215mb of ram], and is it feasible for them to put it on 2.5D interposer alongside "gaming APU"? Optionally, they can only stick that same quad ARM on interposer and use unified GDDR5 for OS...

Hopefully VGLeaks info on Orbis will paint a better picture on PS4 OS.

Edit - If Orbis APU is lets say 250-300mm, how big interposer would be needed to place eight GDDR5 4mbit chips on it?
 
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I wonder how much Sony pays for Vita SoC package [A9 Arm SoC+128mb wideIO vram+2x215mb of ram], and is it feasible for them to put it on 2.5D interposer alongside "gaming APU"? Optionally, they can only stick that same quad ARM on interposer and use unified GDDR5 for OS...

Hopefully VGLeaks info on Orbis will paint a better picture on PS4 OS.

Edit - If Orbis APU is lets say 250-300mm, how big interposer would be needed to place eight GDDR5 4mbit chips on it?

GDDR5 implies they aren't using an Interposer.

If the tech was availble and they could use it, they'd use stacked DDR3/4 @ 1500MHz on a 1024bit bus, that gives them their 192GB/s bandwidth. They could go 8GB too and solve both the capacity & bandwidth problem in a single solution. Heck they could have exceedingly more bandwidth than 192GB/s easily. So yeah I don't see Sony using 2.5D stacking given the rumoured GDDR5 specs.
 
I wonder how much Sony pays for Vita SoC package [A9 Arm SoC+128mb wideIO vram+2x215mb of ram], and is it feasible for them to put it on 2.5D interposer alongside "gaming APU"? Optionally, they can only stick that same quad ARM on interposer and use unified GDDR5 for OS...

Hopefully VGLeaks info on Orbis will paint a better picture on PS4 OS.

Edit - If Orbis APU is lets say 250-300mm, how big interposer would be needed to place eight GDDR5 4mbit chips on it?

I see no benefit to having the whole vita soc inside the ps4, for what purpose? As to ARM cores, you would have them on the same APU and would be A15's which are around 4mm^2.
 
If Sony uses an Interposer, they won't use GDDR5. A 2.5D-stacked package with APU and memory on Interposer would mean they will use WideIO-RAM like for example HBM or HMC.

Orbis with WideIO would look like this: Two DRAM stacks, each with 1024 Bit, 4 DRAM dice per stack, 4GBit per dice, 750Mhz frequency = 4GiB RAM with 192 GB/s

I still expect Sony to use Interposer + WideIO since it is cheaper to produce, it drastically reduces wattage and it will make shrinks much easier. A SiP with WideIO will be more expensive to design, but it will save Sony many millions of dollars in the long run. The only reason against a 2.5D stacked SiP with WideIO-RAM is time: When they didn't manage to finish the design before they reached the point of no return, we won't see it in the new PlayStation.
 
If Sony are going the 2.5D/ imposter/ Stacked RAM/ Wide IO route where has the GDDR5 roumor come from? Are the dev kits likely to be specialised enough to have GDDR5 as main memory by now? Or is it purely from the leaked bandwidth specs?
 
Or they could launch with GDDR5 and abstract memory thru the cert process. Then later come out with a stacked memory solution.
 
Orbis with WideIO would look like this: Two DRAM stacks, each with 1024 Bit, 4 DRAM dice per stack, 4GBit per dice, 750Mhz frequency = 4GiB RAM with 192 GB/s

If they go with 2 DRAM stacks is that effectively like dual channel?

1024 bit seems large. How hard would that be to implement on a Kabini or Kaveri? And with 2 stacks wouldn't they need 2x1024-bit for that APU?
 
If Sony are going the 2.5D/ imposter/ Stacked RAM/ Wide IO route where has the GDDR5 roumor come from? Are the dev kits likely to be specialised enough to have GDDR5 as main memory by now? Or is it purely from the leaked bandwidth specs?

Rumor has it that the final Orbis devkits will be available in summer. I guess we have to wait until then before we know exactly whether Sony will use WideIO or GDDR5. The bandwidth won't be affected anyway.

@ Bagel seed:

As I wrote: 1024 Bit for each stack. So, yes, 2048 Bit for the whole GPU. This stuff is very expensive in design but very economic in production. This makes it perfect for a gaming console which aims to sell 50-100 million units. For a Kaveri or Kabini not so much.
 
Correct me if I'm wrong, but I don't think DDR3/4 1024bit chip even exist, nor any 750MHz wideIO.
If they go 2.5D there aren't many choices.

DDR3/4 is not wide. So it would need at least 16 chips on the interposer to get a usable bandwidth.
WideIO currently in production is only 512bit 266Mhz SDR. 17GB/s per chip.
HBM, not ready yet, would be 1024bit and either 128GB/s or 256GB/s per chip (1066 DDR).
HMC, not ready yet, would be 160GB/s per chip.
 
Looks like 128 gb/s is possible with four stacked dies:

HBM%20on%20interposer.jpg


http://www.i-micronews.com/news/SK-...ed-memory-commercialization-closer,10000.html
 
I think you guys are wasting your time, most likely. If the rumours are to be believed then there's no reason the rumours would get the GPU right and the memory totally wrong.

Also, this is a Durango thread.
 
I think you guys are wasting your time, most likely. If the rumours are to be believed then there's no reason the rumours would get the GPU right and the memory totally wrong.

Whether you use WideIO or GDDR5 wouldn't have much impact on the performance anyway, since they will have a bandwidth of 192GB/s not matter what RAM type they will be using. This is more a question of cost, wattage, shrinks, etc.
 
Looks like 128 gb/s is possible with four stacked dies:
At 1GB per stack, PS4 would need 4 stacks, and would get 512GB/s.
It would be a pretty large space on the interposer, maybe that's why they might have decided to go with GDDR5 (rumors).
 
It's a pretty low density in that one. Maybe those fabled custom Micron chips will give them the amount they're looking for in less than 4 stacks.

If it is 4 stacks does that mean 4 channels to the APU? I guess that's where AMD spent most of their time then to customize an ultra wide version of Kabini.
 
1GB stacks will not last past sampling so no point in even bothering about it. 2GB and 4GB is where HVM will start and then 8 stack versions of those later on.
 
If Sony are going the 2.5D/ imposter/ Stacked RAM/ Wide IO route where has the GDDR5 roumor come from? Are the dev kits likely to be specialised enough to have GDDR5 as main memory by now? Or is it purely from the leaked bandwidth specs?

GDDR5 rumor comes from last summers VGLeaks and this months Eurogamer Orbis specs unveil article. Both of them mentioned 192 GB/s.

Btw, what is the speed of the 128MB WideIO VRAM in Vita?
 
1GB stacks will not last past sampling so no point in even bothering about it. 2GB and 4GB is where HVM will start and then 8 stack versions of those later on.
What makes you say that?
4GB would mean a flat 16gbit per slice, so very large dies, worse yield, There are certainly application where the 2gbit per slice footprint is desirable. Also we don't know if they have a way to test the dies before they stack them.
 
GDDR5 rumor comes from last summers VGLeaks and this months Eurogamer Orbis specs unveil article. Both of them mentioned 192 GB/s.

Btw, what is the speed of the 128MB WideIO VRAM in Vita?
they are the 200MHz parts. So 12GB/s.
 
What makes you say that?
4GB would mean a flat 16gbit per slice, so very large dies, worse yield, There are certainly application where the 2gbit per slice footprint is desirable. Also we don't know if they have a way to test the dies before they stack them.

It satisfies no relevant market. 2 and 4GB is where the market starts/is. There may be a couple niche segments for 1GB but once HVM starts it'll be 2GB and then 4GB shortly after. That's of course IMO though.

I wouldn't get too hung up on die sizes yet, it's estimated that 70% of a ddr4 chip is devoted to logic/control. With logic/control able to go on its own layer along with additional savings from reduced power reqs there's opportunity for some large die savings. We'll need to wait to see what these actually end up coming in at footprint wise.
 
My apologies to moderators for triple posting the same thing, but I was directed by another member (thx patsu) that this is appropriate thread for this question:

This is perhaps a silly presumption from a new member but I would like to hear your opinion regarding possible RAM solutions in PS4.

Considering that GDDR5 could very well be replaced by wide DDR4 in a few years, GDDR5 could become very expensive for Sony in the long haul. So taking that into account Sony probably wants DDR4 in PS4.

Now, since (if rumors are anything to go by) bandwidth is everything in PS4 (a bit hyperbolic, but for the sake of discussion), they obviously have to make DDR4 somehow perform similar to GDDR5.

If they used lowest clock DDR4 (1600 MHz AFAIK), 512 bit wide they would get ~ 102 GB/s (if my calculations are correct; 800*512*2) - this type of setup leads to 90 GB/s deficiency to target 192GB/s bandwidth and would probably be unacceptable solution for Sony (considering that there is no eSRAM/eDRAM to help).

Now, if they used 3200 MHz, 512 bit wide DDR4, they could go up to ~204 GB/s and reach (and slightly exceed) their target bandwidth (or go with 2667 MHz modules and reach ~170 GB/s which I presume would be acceptable).

My question is, is such a thing feasible considering price, tech availability, yields and heat? If not, how can Sony hope to archieve GDDR5 bandwidth with DDR4?
 
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