Apple A12 and A12X SoCs

Discussion in 'Mobile Devices and SoCs' started by iMacmatician, May 7, 2018.

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  1. entity279

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    My impression is that the tax is also considerd to be due to the fact that the ISA has been carried around for many , many years and the compatibility forces compromises on the decoder implementations.
    The ISA could be considered bloated by some. I certainly missed any objective ISA analysis / comparison if ever there was one recently

    The last official context i recall it being tangetially refered to was the 64 bit x86 introduction, with Intel invoking the need for a clean slate when Itanium was spawned. And then in reply, AMD came with amd64 , a port which according to them incured a much lower performance tax than Intel had anticipated (something in the vein of ~ 5 % , ofcourse pulling this number from ancient and unreliable memory)

    Micro-ops' existance, their 'fission' / fusion and whatnot are implementation decisions. They could get abandoned if they would not be worth it. So that shouldn't be a strong reason to support the 'tax'
     
  2. Nebuchadnezzar

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    Most of such an analysis is pointless without in-depth knowledge of the electrical engineering considerations that need to go into the RTL. You could say the ISA is far too high level in this regard.
     
  3. wishiknew

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    Those 1TB iPads with 6 gigs, I'm wondering if that extra ram is due to the flash mapping table being larger on 1TB vs smaller storage sizes.
     
  4. pcchen

    pcchen Moderator
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    Since you'll want to store the mapping table in some kind of NVM, it's very unlikely that main memory is used for storing a significant part of the mapping table (some kind of caching is possible, of course, but you only need about 2GB for the whole table for an 1TB SSD with block-level mapping).
     
    #124 pcchen, Nov 8, 2018
    Last edited: Nov 8, 2018
  5. Platinumjsi

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    I feel like I am reading this wrong, are you saying the A12x's transisters are over 5x denser than the 6700k's?

    1.7b vs 10b for the roughly the same size peice of silicon?

    If so how is that possible? I thought Intels 14nm and TSMC 7nm were only about one gen apart? TSMC 10nm being equivilant to Intels 14nm?

    I feel like the 6700k transister count must be to low? the wiki article does not seem to have a source for the number?

    Still its bonkers what Apple have done here.
     
  6. wco81

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    Lot of speculation that Apple will switch Macs to ARM. Or that they will make iOS more Mac-like, with cursors, windowing, access to file system, maybe even installs of apps. bypassing the App. Store.

    But to support Mac OS or to support IOS with more desktop features, you'd think they'd have to really more RAM in the Apple SOCs, at least 8 GB with options to go to 16, 32 or 64 GB? Will the Apple AOC architecture scale in performance and efficiency as you run more demanding OSes on it?
     
  7. Laurent06

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    What makes you think the SoC already don't support more than current devices have? And given that the largest iPad has 6 GB of RAM, it very likely supports 8 GB.

    More than the OS itself, I wonder how Apple SoC will scale with heavier multitasking, and apps requiring gigabytes of data (SPEC results look promising here).
     
  8. Ryan Smith

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    This is probably a fool's errand, but has anyone been able to work out the number of ALUs in the A12? I'm trying to calculate some of this information for a single GPU core, but I'm lacking a good point of reference.
     
  9. mfaisalkemal

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    source
    from those blogs, i believe it was pointed to Apple A12x GPU because mobile space, transistor counts, and apple keynote announce(xbox one s GPU performance).

    i guess every core have 96 FP32 ALU and 8 texture unit. 729,6 GFLOPs for 4-core A12 GPU and 1300 GLOPs for 7-core A12X GPU.

    650GFLOPs for A10X GPU.
     
  10. Arun

    Arun Unknown.
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    It's 64 FP32 FMAs per core (or 64 Vec2 FP16 FMAs). I guess you could argue it's more "flops" than that with special function co-issue etc... but then the same would be true for many other architectures and we only count FMAs for those.

    Ryan, I wrote a couple of Metal microbenchmarks a few weeks ago that had some interesting results - been meaning to clean up the code, open source it, then write a blog post about their ALU design - but I've been getting distracted by other things. I'll PM you later today or tomorrow when I have a chance :)
     
    #130 Arun, Dec 7, 2018
    Last edited: Dec 7, 2018
  11. DavidC

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    That's because a quad-core U with GT3e graphics doesn't exist.
     
  12. ToTTenTranz

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    It does
    , though at minimum cTDP the consumption goes up 33%.
     
    #132 ToTTenTranz, Dec 13, 2018 at 9:19 AM
    Last edited: Dec 13, 2018 at 9:32 AM
  13. DavidC

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    Technically you are correct in that its classified as a U, but as you state, even on cTDPdown it uses 33% more power, and I've never seen a laptop that uses cTDPdown exclusively.

    But yea I meant 15W when talking about the Us. Outside of Apple, and maybe Sony no-one else uses 28W U chips.
     
  14. ToTTenTranz

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    Don't the fanless Surface Pro models with the Core i5 use cTDPdown?

    Which is a damn shame. So many Core i5/i7 GT2 being sold in laptops with a Geforce MX110/130 that would be better off with the GT3e version instead.
     

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