AMD to announce Phenom X3 during IDF?

What an unorthodox idea...

Could be a quite brave one though. I'm sure the performance delta in many situations would be pretty minimal between a 3 and 4 core system considering all cores share the same memory bus and many apps are poorly multithreaded or not at all.

Sounds interesting.

I'm assuming the price will be right. :cool:
Peace.
 
The article I read about them said one core of the four disabled.

And I'll never believe they'll make native triplecore. They must have a lot of defectice quadcores they'd like to sell.
 
The article I read about them said one core of the four disabled.
Which article?
The text above says:
Zudem habe der Hersteller ebenfalls noch darauf hingewiesen, dass es sich bei den Triple-Kern-Versionen nicht um Vier-Kern-Modelle mit einem deaktiviertem Kern handele, sondern um echte Drei-Kern-Prozessoren.
"In addition the manufacturer pointed out, that the triple-versions are no quad-versions with one deactivated core, but native triple-cores."

And I'll never believe they'll make native triplecore. They must have a lot of defectice quadcores they'd like to sell.
That I believe too, Barcelona die-shoot seems not that you easily cut one core, this would end in a big offcut.
 
Xenon's cores are SMT-enabled (2 threads per core) so this could not replace it even if we could get around the issue of being a completely different ISA ;)

Im not suggesting you could swap it out now for a Xbox 360 Mk2 or something. Obviously that wouldn't work ;)

But the 360 certainly would have been interesting if it was originally fitted with one of these (which I know is completely impossible for many reasons).

Meh, my only real reason for the comment was that its the only other 3 core architecture in existance which just makes me wanna compare them :D
 
Hans de Vries from chip-architect.com pointed out that the L3 would fit nicely in the space left over from removing the fourth core from a quad-core chip. That means the extra die space with the L3 hanging off to the side would be conserved.

This would put the die size just slightly above that of a current high-end Athlon X2 chip.

If the juggling of multiple masks can be handled economically by a cash-strapped AMD, the tri-core design would allow X2 production costs (no improvement, but already worse than Intel's) with pricing better than current dual cores (better than nothing).

There's also a graceful failure ladder for bad Barcelonas.
One bad core = tri-core.
Two bad cores = one of the dual-core variants.

Customers likely wouldn't care how the chip came about.
 
Xenon's cores are SMT-enabled (2 threads per core) so this could not replace it even if we could get around the issue of being a completely different ISA ;)

The single core PC I'm running right now runs 281 threads according to the task manager ;).
if you abstract the ISA problem and VMX128 code in particular I'll abstract the hardware threads away :p. A Phenom X3 would destroy the Xenon worse than an Athlon 64 is better than a P4 with HT.
 
The single core PC I'm running right now runs 281 threads according to the task manager ;)

Inactive threads mean little to overall performance unless they have a large memory footprint that overflows system RAM.

if you abstract the ISA problem and VMX128 code in particular I'll abstract the hardware threads away :p. A Phenom X3 would destroy the Xenon worse than an Athlon 64 is better than a P4 with HT.

XB360 devs can count on 6 hardware threads with Xenon though. Cutting that number in half wouldn't be a good idea, no matter how much faster K10 is compared to Xenon in single-thread IPC/IPS.
 
The tri-core Phenom would be something like 236 mm2 at 65nm.
Xenon at 90nm is 168 mm2.
With decent scaling, Xenon would be less than half the size of Phenom at the same process node.

The size, cost, and heat of Phenom are the primary reasons for its being a poor console chip.

I wouldn't bet on the number of threads being all that important in this case. The x86's better single-threaded performance and large caches would help soak up a lot of the context-switch penalties.

Xenon's overall weaker per-thread performance would count against it.
 
I think the choppy ports of single-threaded PC games demonstrated how not-so-great Xenon is at some types of code. I have no doubt that Phenom would stomp all over it in most desktop cases. Actually probably in all cases unless Xenon was highly optimized for because that's likely the only way to make it go fast. Desktop CPUs aren't designed like that because the large majority of programmers care more about code functionality than performance I think. So, desktop CPUs have lots of extra hardware to deal with the non-optimal code.

I do wonder about the viability of a tri-core. Intel can just drop Q6600 prices more or make a slower clocked "value" model. AMD is going to end up selling these things quite cheap I'd say.
 
I think the choppy ports of single-threaded PC games demonstrated how not-so-great Xenon is at some types of code. I have no doubt that Phenom would stomp all over it in most desktop cases. Actually probably in all cases unless Xenon was highly optimized for because that's likely the only way to make it go fast. Desktop CPUs aren't designed like that because the large majority of programmers care more about code functionality than performance I think. So, desktop CPUs have lots of extra hardware to deal with the non-optimal code.

I do wonder about the viability of a tri-core. Intel can just drop Q6600 prices more or make a slower clocked "value" model. AMD is going to end up selling these things quite cheap I'd say.

I wonder if its economically viable for AMD to sell Tri-cores in place of dual cores? I.e match each of Intels dual core offerings with a Tri core. Even if they were slower in single threaded code the extra core would win many over. At the same price I think I would go for a tri core over a dual core even if the dual core was 15-20% faster in single threaded code.
 
The tri-core Phenom would be something like 236 mm2 at 65nm.
Xenon at 90nm is 168 mm2.
With decent scaling, Xenon would be less than half the size of Phenom at the same process node.

The size, cost, and heat of Phenom are the primary reasons for its being a poor console chip.

I wouldn't bet on the number of threads being all that important in this case. The x86's better single-threaded performance and large caches would help soak up a lot of the context-switch penalties.

Xenon's overall weaker per-thread performance would count against it.

But then you have to account for Xenon's higher clock. In the end Xenon still comes out on top. Granted, I'd rather have a tri-core Phenom in my desktop than a Xenon any day, but then we have to get into the whole "closed-architecture console vs. open-architecture PC" arena, and that's not really necessary.
 
Phenom is going to debut at or above 2.4 GHz and should top 3.0 GHz in the design's lifetime.
The top models would be close enough in raw MHz, and Xenon's high clock speed is countered by the in-order pipeline and reduced issue width.

Early estimates pegged Xenon at less than an Athlon64 X2, and I haven't heard any revisions to that assessment.

If there are any points where Xenon would win, I'd point to either it being something to do with its more direct cache sharing with the GPU, or something the Altivec unit and the much larger register file are better suited for.

The threading deficit is likely more than compensated for by x86's surplus of resources.

edit:
The confirmed X3 is apparently the same die size as an Agena, since indications are it's just one core fused off.
This makes the heat and die size arguments more in the favor of Xenon.
 
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I think Xenon has the advantage in SIMD for sure. But that's only if you really, really optimize for it. On other levels I am certain it is far behind even Athlon 64. Its lack of OOE would really hurt its clock efficiency on the desktop. It also doesn't really have enough L2 cache for 3 cores. Xenon is what could be built in the price range MS wanted and still have some great potential for game scenarios. Its high clock is no doubt partly due to its simplicity and isn't really meaningful other than for theoretical SIMD performance.

This is all my semi-read-worthy opinion of course.
 
But then you have to account for Xenon's higher clock. In the end Xenon still comes out on top. Granted, I'd rather have a tri-core Phenom in my desktop than a Xenon any day, but then we have to get into the whole "closed-architecture console vs. open-architecture PC" arena, and that's not really necessary.

You've got to be kidding? Just because Xenon runs at a higher clock speed doesn't mean anything for its performance. I am pretty sure a Xenon core is a LOT slower per clock than even a P4 so a comparison to a Phenom is way out there. You only have to look at its lack of cache, lack of OOOE, lack of execution resources (other than SIMD) and 2 issue width to see why clock speed is a poor measure of comparison to any modern desktop CPU.

I recall from a pretty old set of tests Xenon benching at around 1.6Ghz G5 territory (at best) for single threaded code which is actually pretty good but clearly far slower than a 2Ghz Phenom with a much higher IPC (than G5).

Sure Xenon will be heavily optimised for in a console environment but if Phenom were in its place the same would hold true for it too. Im sure all that cache and those SSE3 units can be made to do some pretty nifty things if coded to specifically.

Thats not to suggest Phenom would be better as a console CPU of course. As we all know the impracticalities of heat, power, cost and most obviously of all, time, prevent that from being remotely possible.
 
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