AMD hUMA ( Uniform Memory Access )

Discussion in 'GPGPU Technology & Programming' started by lanek, May 1, 2013.

  1. lanek

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  2. Xenus

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    Sounds basically like it shares much of the same archetectural detials as have been announced with the PS4 and this is just AMD saying hey you know that stuff we developed it's not just a one off custom solution it's in all our APU's.

    Which of course is pretty awesome but if they have a memory controller for it that supports GDDR5 as well that'd be really nice.
     
    #2 Xenus, May 1, 2013
    Last edited by a moderator: May 1, 2013
  3. Dade

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    I'm looking forward to this feature, it will make the task of passing complex data structures to GPUs soooo much easier.
     
  4. fellix

    fellix Hey, You!
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  5. imaxx

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    i'm not sure I understand: in llano you had already unified memory using the onion bus, right?

    Also, in llano(trinity?) isnt the physical memory all accessible by both CPU and GPU?
    I mean, GPU can access any physical address, like CPU, in APus no?
     
  6. 3dilettante

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    Note that the presentation you linked makes a distinction between system memory and local memory.
    Portions of RAM are initialized at startup as being the device memory of the GPU.
    The GPU memory is pinned, so it won't be paged in and out of physical memory (edit: without driver intervention).

    The CPU can also suffer severe performance degradation if it tries to read from that memory.
     
  7. imaxx

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    Yes, I understand that GPU has its own 'virtual addressing space' (or whatever it is, as pagein/pageout can occur only in a 'virtual addressing' of some kind)- but physical pages are always there, as they are just the flat physical addressing, no?
    I mean, in CPU you translate a virtual address to the physical address and the go there to read the data from the physical address.

    What I meant is:
    GPU maps its addresses(?) to physical pages in RAM - ok.
    CPU maps its virtual addresses to physical pages in RAM - ok.
    What happens if those (physical!) address are the same for some page? What prevents them to overlap in llano? How can GPU and CPU ram be divided???
    In discrete video cards this wont happen, as physical memory of CPU and GPU are different (phisically).
    But in APU, they are the same.
    So I do not understand - what do you mean when you say 'pinned memory'?
    You mean that something does prevent access to i.e. physical address greater than a certain value?
    edit-----
    aaah i see my naive assumption that one could address physical memory as a pointer - it is not that way.
    Yet, I miss something... the soldered memory is the same, why they cannot share it?
     
    #7 imaxx, May 9, 2013
    Last edited by a moderator: May 9, 2013
  8. 3dilettante

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    They can read the same physical memory, but it's a significantly more complex process with high overhead.
    Stomping on memory with no regard to virtual memory protections is a fast track to a system-ending error.
    There's a whole set of rules required to function as a peer in the same virtual memory space, and current GPUs don't know how to do all of it.
     
  9. moozoo

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