power management

Translation lookaside buffer (TLB) caches virtual to physical address translation information and is used in systems ranging from embedded devices to high-end servers. Since TLB is accessed very frequently and a TLB miss is extremely costly, prudent management of TLB is important. We present a...

A Survey of Techniques for Architecting and Managing GPU Register File Accepted in IEEE TPDS 2016 Part of the abstract: To support their massively-multithreaded architecture, GPUs use very large register file (RF) which has a capacity higher than even L1 and L2 caches. In total contrast...

A Survey Of Techniques for Approximate Computing accepted in ACM Computing Surveys 2016, reviews ~85 papers. Covers: * Approximate computing in CPU, GPU and FPGA and various processor components (e.g. cache, main memory, secondary storage) * Approximate storage in SRAM, DRAM/eDRAM, non-volatile...

1. A Survey Of Architectural Techniques for Near-Threshold Computing Accepted in ACM J. on Emerging Technologies in Computing Systems, 2015 Part of abstract: Low-voltage computing and specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and...