The dev kit confirming tweeter has deleted his account.
They released the white paper and the talk will get posted online within the next few months.
The language matches the language used for other dev kits. The feet placement and inlets on top for another unit to be stacked are suited for dev...
I believe it’s likely a wide heatsink/heatpipe structure with dual fans on either side, similar to how high end laptops do it.
Some Navi variants will have enhanced INT capabilities. (This is from the white paper)
I agree that it is likely for intake because the front face is usually unobstructed, even when placed in a rack.
Why can the channel be ingress but not egress?
It’s not fake. It’s an actual SIE patent.
I imagine a wide heatsink assembly with fans on either side of the V.
Wooh boy. Credited designer is the PS4 designer.
This figure is for the whole board, which included memory (30-40W), VRM overhead, and various board IO. It also has whatever voltage AMD sets it...
“In things like Arden’s test result, you can see the letters ‘Raytracing’.”
New 55 slide deck on RDNA architecture
I’m reminded of this:
From here: http://www.reedbeta.com/blog/mesh-shader-possibilities/
So all the Gonzalo scores are bogus but this one is legit because?
Should shave a few watts off if cache is indeed only 8MB L3 and not needing to drive I/O to an I/O die.
SoCs aren't just wafer cost. Packaging, assembly, and test are all significant operations. I'm assuming the cost of dicing is included in wafer...
Per unit BW is the most relevant metric.
The chances engineering/quality sample silicon was ready and available for dev kits is very slim. We know historically that dev kits with actual...
Navi and Vega 7nm are probably their highest volume examples.
It's a shame all these memory manufacturers all keep having mishaps. Fortunately, they only seem to occur when the market is oversupplied, so it...
Sounds like yields are great, so consoles just have to worry about wafer cost.
And here is news/name on 2nd gen 7nm. I fully expect...
Don’t necessarily agree with everything here, but AMD on The Full Nerd podcast did suggest they’d have more to share soon.
It's on an official AMD slide.
My guess is FPGAs, 4th gen EPYC, or AMD’s supercomputer custom parts. All high margin products. I believe 2021 was their target for the supercomputer.
Didn’t @Ryan Smith indicate that chart should be read as “by 2021”?
Is there aversion to just calling them stress tests?
I think this is a slightly myopic view. Virtually every rumor and source has said Lockhart did indeed exist at some point, and that it was a...
There was the thought that the Gonzalo -> Ariel -> Navi 10 LITE was a conclusive link, but now all Navi versions have a “LITE” variant, which...
PS4 Pro did this, but memory controller was off package IIRC.
Depends if they scale (384 bit) or change the memory interface (HBM).
And 2080 ti is a fixed entity. It has one perf/Watt point and that’s the clock and voltage profile already chosen by Nvidia.
Perf/Watt changes with clocks. Clocks are a linear scaling. Power scales somewhere between the square and cube of the voltage.
Pretty sure an 80 CU RDNA would beat a 2080 ti with margin barring scaling issues (bottlenecks, BW)
Good question. My guess was that it was the most feature comparable architecture to Zen 2 at the time, but that led me down the road of thinking...
Exactly. We may get 60FPS early on as cross gen ports are dominant, but declining FPS and resolution will happen as it does every gen.
No, but it’s an optical shrink compatible with 7nm. That’s what makes it attractive given the 7 to 7+ gains are meager.
This is the path 590 took...
Apple reportedly balked at 7nm+ pricing. And with 6nm offering a path to EUV for 7nm, I don’t see why consoles would want 7nm+.
Transistor characteristics will follow a bell/normal distribution, so the relationship will not be linear.
The 4-10x clock speed advantage was negated? I think not.
Further comments from Phil Spencer have stated this is CPU speedup, which makes sense.
1.6 GHz Jaguar:
1.5 * 1.05 * 1.15 IPC improvements
5700 saves 45W TBP by lowering the clock 125MHz and turning off 4CU. They could clearly up the CU count and lower the clock to hit 10TF without...
The language Lisa uses closely matches the language MS used for Scorpio. It's marketing fluff.
Console design is a never-ending quest to create new bottlenecks.
It’s a hat tip. They know people are looking.
Thanks. It wasn’t showing for me.