Not sure what you mean here? Balanced means that the pipeline throughputs match under certain circumstances, for example if the rasteriser has a...
Unfortunately I can't speak for IMG as I don't work for them anymore, so perhaps the guys from PowerVR/IMG could explain why they've worded it as...
I guess you're unaware that tiling is basically the same as course grain (conservative) rasterisation, and is no more of a bottleneck than...
I agree it does work quite well, but to say it again it isn't sufficient to solve the back end ROP BW issue, not even close. There's two answer's...
I can be 100% certain because it's what I do for a living ;-) Seriously, practically FB compression is somewhat limited when compare to the...
Modern IMRs most definitely do break primitives down into screen space tiles to render them, there was even a thread on here a while back where...
Modern IMRs are not just tile caching, they cache triangle parameters and submit to a tile locality, for small geometry sets this looks exactly...
Hmm, I can't read BXS without inserting some ***** ;-)
Sorry, but that's simply not correct, in all modern TBR/TBDR architectures ALL geometry processing happens before tiling, as such the GS does not...
Everyone, really? Care to name those, beyond Qualcomm, who are actually shipping their own GPU tech in the mobile AP space in any significant way?...
That's interesting, I can think of quite a few compute workloads that could benefit from significant short term clock boost, I guess vendors just...
I don't think compute is a poor excuse of turbo clocks, in fact I think the exact opposite is true, however if the higher clocks are only being...
Gaming isn't the only use of the GPU, many compute uses e.g. local photo or video editing/enhancing would definitely benefit from higher burst...
You can't use different architectural generations as examples of higher clock != lower power efficiency, it's a completely meaningless comparison,...
To answer Sebbi's question differently, there's no "modality", there's F16 and F32 ALU's, what's executed only depends on the instruction being...
Design by committee is always going to have problems with rapid/paradigm change in comparison to dictated direction (e.g. Khronos vs MS approach).
Ha! ;-)
Interestingly,NVidia have always been one of the biggest barriers to moving the OpenGL beyond it's roots.
Actually I've yet to see a non contrived case of tessellation use that didn't significantly expand the amount of input geometry. This isn't a...
I would say that it's exactly the kind of thing you would expect a company to release when they start to worry about competition where they...
In theory it's just a change to the fixed function tessellato the rest of the pipeline could stay the same, although no one, including NV, has...
One of the biggest issues with Dx11 style tessellation is that LOD is not continuously variable across a patch, i.e any LOD difference between the...
What are you, Mr left twix or something?
Well it seemed pertinent as I was thinking about the bacon that I was cooking at the time. PS - Brown saurce was applied.
BACON.
Still seems to be chugging here...
There's a rumor that Simon is actually 80% pocket!
Firstly, at no point have I said there is performance to spare on current hardware, that's your claim. I have specifically stated that current...
You really think that ~30fps on GLBench2.5 isn't struggling? Not wanting to dwell on this, but you did quote ARM marketing bullshit about GPU...
Hmm, not sure how you want me to be more specif. Sorry, but you're wrong, current mobile GPUs don't have "room" to spare when running...
So if you're not saying ES2.0 is holding things back, why do you think ES3.0 is going to result in an improvement? I think it's a common...
Most mobiles games aren't but that's more to do the casual nature of most mobile gaming or the different cost model employed, it has absolutely...
Before you can add features to games you need the performance to use them, do you really think mobile GPU's have performance to spare when running...
It pretty ironic that ARM fixing a limitation in their CPU's is marketed as a reason for using T6xx. The reality is that IMG GPU's have supported...
Ahem, we are a unified design you know...
The bacon butties come with a choice of two sauces?
What's you're basis for saying it's more representative?
Not sure how we'd reduce Rogue branch granularity to be less than '1'... ;-)
In what way would allowing arbitrary divergence without the SIMD penalty seen on modern desktop GPU's be pitiful? Note that there are penalties...
Yep.
I don't think the GL bench battery test makes much sense as (afaik) it doesn't involve setting the brightness of the tested device to the same...
Yeah, the less slippery shape probably helps, but some would say I just need to adjust my pocket size :lol:
When I went from a Galaxy S1 to an iPhone4S I noticed two things that seem relevent to this (somewhat daft) discussion, 1) Web browsing...
That's interesting, would have to get hold of the relative active area of the sites to determine how much extra noise the size reduction would...
Nothing random in the information, it is directly relevant to the whole "megapixel" discussion, all you had to say was that they hadn't reduced...
Try reading eveything that I wrote rather than picking out one small part of it, here it is for you, Everythign I say here relates to...
Interesting, where did I jump to "fast and cheap concluesions"? I pointed out the real technicals issues that occur when sensor site size is...
Increasing sensor resolution to these levels is of debatable value. Not only do you get increased photon noise you also have a greater proportion...
I'm guessing that as a tiler can revisit multiple states from tile to tile they incorrectly assumed that this would significantly impact bandwidth...
You're confusing Samsung with someone else http://www.imgtec.com/corporate/newsdetail.asp?newsid=656