modern GPUs and on-chip caches ?

[chavvdarrr]

OK, is there someone able to throw some light on cache sizes used in current generation "super"-chips? (R300/350, NV30)

 

[DegustatoR]

AFAIK, it is a confidential info. One can only guess about it...

 

[chavvdarrr]

AFAIK, it is a confidential info. One can only guess about it...

LOL, I know what you think on the subject...... , what I look for is more opinions... maybe size of caches in ATi chips is not so confidential info ?

 

[MuFu]

Texture caches are a few KB only. There are other small buffers throughout most designs but I assume the total, on-die is still generally in the order of KB, not MB.

MuFu.

 

[KimB]

One thing we do know is that GPU's have many specific caches for different purposes. These caches don't compare well to CPU caches, and they typically don't need to be as big as CPU caches because 3D graphics rendering is so predictable.

 

[Arun]

I remember nVidia claiming 50% or 60% cache for the NV25... Might be 40%, though, but it is definitively 40% or higher.


Uttar

 

[kid_crisis]

Uttar, do you mean 40% of the chip area is cache, or 40% of the transistor count, or something else? I seem to recall it being 15 to 20% of the total die area. I find it hard to believe it's 40 to 50 % of die area.

 

[megadrive0088]

my question is, when will PC GPU/VPUs have large (relatively) amounts of on-chip memory like PS2's GS (4MB eDRAM) and Gamecube's Flipper (3.12MB 1T-SRAM) ?

btw, the first I had ever heard of putting memory onto a graphics chip was in a small article in Intelligent Gamer magazine about the 3DO MX, the follow-up to the M2. reportedly, one version of the MX was to have video ram or VRAM on the chip. I think Sony and Nintendo both learned lessons about this when they went to design their console graphics (GS & Flipper) for this current generation.


if PC graphics are not going to get significant amounts of on-chip memory anytime soon, then I can only look forward to Playstation3, which is likely to have (edit) 64-96 MB of on-chip memory between its two main pieces of silicon. (the EE3/BroadBand Engine and GS3/Visualizer)

edit: either 32 MB / 32 MB or 64 MB / 32 MB (right Panajev?)


oh and Nintendo's next console should follow in Flipper's footsteps also, with a significant amount of oh-chip memory... at least 32 MB i hope.

 

[Panajev2001a]

Either 32 MB + 32 MB or 64 MB + 32 MB ( Broadband Engine and Visualizer respectively ).

 

[DegustatoR]

LOL, I know what you think on the subject......

chavvdarrr = chavy@iXBT?

 

[asicnewbie]

I think I read in an old VGA programming book that the Tseng Labs ET-4000 (circa 1991) devoted 30-40% of the total transistor-count to host-interface data FIFOs. That give it an vast ISA-bus throughput over the other 16-bit VGA cards

As for PC-graphics, I can think of only a handful of companies ever shipping embedded-framebuffer products, and they were laptop parts. I know Trident made one, and I think either Silicon Magic or Neomagic also made an embedded-DRAM graphics controller. But their focus was on not on rendering-performance, but rather 'total cost of integration.' For laptops, PCB space is at a premium, so reducing the board footprint of the graphics subsystem was very attractive. Additionally, I think one of the companies cited better power-savings, attributing the savings to the removal of an external DRAM I/O interface (which sucks a little power.)

More recently, I think the Rendition Redline was retargeted for laptop applications (after Micron acquired Rendition in 1998), and it was redesigned with an embedded framebuffer.

Historically, game consoles and PC-graphics AIBs (add in boards) have had very different requirements. Whereas game-consoles drove video-resolution (720x576), PC-boards must drive to much higher resolution displays. Thus a PC embedded framebuffer would have to be made large enough to accomodate the highest supported resolution. I guess the PC-designer could compromise and say 'ok 3D-only up to aa fixed resolution', but that wouldn't look very good in marketing the product.

With the advent of HDTV and advanced silicon processes, future game consoles will be driving at least 1280x720 (though 1920x1080 would be even better), so I guess the resolution-requirements of future game-consoles will be more comparable to PC displays.

 

[ram]

I remember nVidia claiming 50% or 60% cache for the NV25... Might be 40%, though, but it is definitively 40% or higher.


Uttar

Actualy, it is definitly lower than 40%. According to this presentation, 78% of the die area is logic, and just 20% is memory.

 

[3dcgi]

asicnewbie brings up a good point by mentioning FIFOs. Are they included in that 20% number ram quoted?

A previous poster was definitely correct that the caches are KBs and not MBs. Even with multiple caches on the chip they probably don't hit MBs in total.

 

[UberLord]

Could someone enlighten me with a basic overview of how a small say 16K cache would be of benefit to any given non-texture operation?

I just can't think of any reason for a cache for 3D beyond the use of textures.

 

[KnightBreed]

Could someone enlighten me with a basic overview of how a small say 16K cache would be of benefit to any given non-texture operation?

I just can't think of any reason for a cache for 3D beyond the use of textures.

Vertex or fragment shaders?

 

[Reverend]

In reply to the original post -- this is usually a closely guarded internal secret and is considered proprietary information.

 

[UberLord]

Vertex or fragment shaders?

Either.

What I'm driving at is I know what a cache is and how it would benefit hard disks. It's only a simple logic step to see how that would benefit textures.

However, I'm at a total loss to see why a cache would benefit anything else for a 3D GPU.

 

[Tagrineth]

Could someone enlighten me with a basic overview of how a small say 16K cache would be of benefit to any given non-texture operation?

I just can't think of any reason for a cache for 3D beyond the use of textures.

See also Kyro II and the fact that it can do all Z-buffer operations on-cache.

Also R300 stores the low-res hierarchal Z levels on-cache to save on RAM space, IIRC.

 

[mczak]

I remember nVidia claiming 50% or 60% cache for the NV25... Might be 40%, though, but it is definitively 40% or higher.


Uttar

Actualy, it is definitly lower than 40%. According to this presentation, 78% of the die area is logic, and just 20% is memory.

Well 20% in die area is probably about 40% in transistor count. (It could be more or less than 40%, but generally memory cells can be arranged much closer together than logic cells).

 

[Luminescent]

How many bytes of memory could you fit in ~ 25 million transistors (40% of NV25's 63 million)? This should give us a round estimate of cache size.