When are the 65nm PS3's and XB360's shipping?

[Zaphod]

Nah. No bad. Rys also posted the 'news' on October 1, citing Dailytech, who in turn cited the thread(s) in question. Keeping one's sources straight when internet news/rumors start to fly is (sadly) easier said than done...

 

[AlNom]

While I'm here, what exactly is an 80nm optical reduction?

With an existing 90nm design, one may pretty much use the optical shrink in the fabrication plant with few issues. i.e. just pop in the same transistor design and use the smaller fab process. Enhancements can be made if desired, but the optical shrink is meant to be an "easy" way of decreasing chip size on the wafer, and reduce costs more quickly or in the interim before jumping to the next full node; it's also an "easy" path to reduce power consumption.

With full process node shifts (e.g. 90nm ->65nm), engineers have to go in and redesign the entire chip to deal with more significant issues relating to static and dynamic power consumption. The clock speed is something that has to be carefully considered as well.

 

[Carl B]

That looks like the same chip though. We all pretty much agreed that it isn't 65nm.

... is anyone gonna tell them that? LOL

For the record Kisuke, we're not actually 'agreed' that it's not 65nm; all we're really acknowledging is that the die is large were it to be 65nm.

But 65nm has seen some weird transitions this gen across different processes, and nothing would be a surprise IMO at this point. What we know (if truly anything is really 'known' these days) about the XeCPU is that Chartered is the firm in question; now to my knowledge, they don't have an SOI 80nm line (and it assumes the XeCPU remains SOI). So... if there's been a shrink at all there, it probably *is* to 65nm. It could also just be a 90nm re-spin at this time. However, we've been hearing about the move to 65nm at Charted for the XeCPU for many months now, so IMO if it's still at 90nm and they bothered with a new revision, there's got to be some sort of snag in the transition.

On the GPU/eDRAM the 80nm shrink becomes more likely, with the move to TSMC for the eDRAM alone potentially allowing for any level of variance even at 90nm.

So... a lot of different moving parts here actually.

(PS - Do we have any actual die size reports yet from anywhere?)

 

[Kisuke]

For the record Kisuke, we're not actually 'agreed' that it's not 65nm; all we're really acknowledging is that the die is large were it to be 65nm.

But 65nm has seen some weird transitions this gen across different processes, and nothing would be a surprise IMO at this point. What we know (if truly anything is really 'known' these days) about the XeCPU is that Chartered is the firm in question; now to my knowledge, they don't have an SOI 80nm line (and it assumes the XeCPU remains SOI). So... if there's been a shrink at all there, it probably *is* to 65nm. It could also just be a 90nm re-spin at this time. However, we've been hearing about the move to 65nm at Charted for the XeCPU for many months now, so IMO if it's still at 90nm and they bothered with a new revision, there's got to be some sort of snag in the transition.

On the GPU/eDRAM the 80nm shrink becomes more likely, with the move to TSMC for the eDRAM alone potentially allowing for any level of variance even at 90nm.

So... a lot of different moving parts here actually.

(PS - Do we have any actual die size reports yet from anywhere?)

Thank you for clarifying!

From what I gathered you said earlier, the process shrink to 65nm is somewhat gradual before it can reach the rull reduction? If that's true, does that mean the full heat/energy savings won't take place until the final revision? (ie. those who are waiting for a non-RROD 360 shouldn't go out and get one of these just yet? maybe wait for a further revision?)

 

[Carl B]

Thank you for clarifying!

From what I gathered you said earlier, the process shrink to 65nm is somewhat gradual before it can reach the full reduction? If that's true, does that mean the full heat/energy savings won't take place until the final revision? (ie. those who are waiting for a non-RROD 360 shouldn't go out and get one of these just yet? maybe wait for a further revision?)

It's not that the shrink to 65nm is or isn't gradual or anything else really... it's just that it can yield sub-optimal results when first implemented. The fab, the process, and the chip design all play a role in that.

Now I want to stress at this point that I'm not saying the XeCPU is or is not 65nm - I was just clarifying what we know up until this point.

But in terms of process moves in general, take for example Intel going to 65nm - you can trust that this is something that will go smoothly, and indeed it did. Now take AMD; the shrink to 65nm for K8 seemed to go well enough in some respects, but when discussing their Barcelona design there seem to be problems afflicting the fabrication, namely in clock ramping. Now let's take IBM - Chartered shares a very similar fab process by the way to IBM, so it's a good example. All we know of IBM and 65nm is their shrink of Cell to 65nm. Now, for that revision, it also happens to be the HPC version of the chip that we have the die-size for. And the shrink was really quite minimal. Part of that could have to do with the new memory controller, who knows... but it's not the gain anyone would have expected for a 90nm to 65nm move. Meanwhile over at Nagasaki - which also shares the same SOI process with IBM - Sony reported that the 65nm shrink of Cell was 40% smaller than the original. So, a wide range of different (initial) results for many different reasons.

Results in node shrinks just aren't as assured as they used to be, with complexities increasing greatly. For that reason when I look at the die shot of the CPU, I would truly believe anything from 90nm SOI or bulk re-spin to 80nm bulk process to 65nm SOI or bulk shrink. BUT, that said... I'm dying to know which it really is.

And more for the immediate term, I just wish the guy that opened his console up had bothered to do some die measurements.

 

[Versatil]

The new PS3 40GB model has a different aeration system. Possibly the PS3 65nm?

 

[J_Saint]

After the 360 Falcon comes the Jasper...

Jasper is the code name for the next motherboard for the Xbox 360. It will becoming next August, in time for next year’s holiday season. Jasper is going to have a 65-nanometer graphics chip from ATI Technologies, as well as smaller memory chips. That isn’t much information, but it’s enough to tell us about their cost-reduction plan. If you ask me, it’s a bit of a slow pace.

I don’t know why it will take Microsoft essentially three years to cost reduce the size of the graphics chip through a manufacturing shrink. It doesn’t seem like they’re in a hurry to launch a redesigned Xbox 360 graphics chip, considering that Intel introduced its first 65-nm chips a long time ago. ATI uses TSMC to make its chips out of Taiwan, and TSMC hasn’t been the fastest at moving to 65-nm manufacturing. I understand these tasks are difficult and they take a lot of engineering resources. Microsoft has had to divert a lot of engineers to debugging problems with Xbox 360 reliability. Even so, you would think that they would have moved faster, since the move to 65-nm graphics chip will likely be one of the best things they can do to improve the reliability.

http://blogs.mercurynews.com/aei/2007/10/xbox_360_secrets_after_falcon_comes_jasper.html

 

[Laa-Yosh]

Any news on the upgraded - 80nm? - Xbox360s? Latest piece of info has been that certain Halo Edition models (built after mid september or so) are built with the new chips, but what about the rest? Any word on upgraded Premiums? There's for example a Halo3 bundle on sale in Europe (with HDMI output) and I'm getting very, very tempted...

 

[Carl B]

Thread closed to seek redundant discussion now that more in depth information on 65nm consoles is coming out; any further information on Falcon, Jasper, and PS3 revisions should originate new threads.