IBM slashes wafer prices + free masking services

[McElvis]

Could this be why nVidia has moved some production to IBM?

THE SEMICONDUCTOR division of IBM is going for the jugular against major Taiwanese foundries TSMC and UMC by undercutting prices on its own services by a staggering 20 per cent.

And IBM, said today's Economic News of Taiwan, will also offer free masking services to customers to lure them into its semiconductor web, in addition to slashing the price of work on .18 micron wafers by a staggering 20 per cent.

link http://www.theinquirer.net/?article=8729

 

[Dave Baumann]

Thats on the .18um process, which NVIDIA isn't using anymore!

 

[McElvis]

Sorry, mis-read story.
I thought that they ment in general reduce prices and offer free masks, with upto 20% price reduction on .18 process.

Please ignore

 

[epicstruggle]

Thats on the .18um process, which NVIDIA isn't using anymore!

are all the current chips produced by nv right now (gfx, gf4, gf4mx,nforce,nforce2....) all using .15 or smaller?

 

[jvd]

Heh thats not a bad deal though. Free masking must save alot of dough and can help some smaller players come out with a card .

 

[asicnewbie]

http://www.commsdesign.com/story/OEG20030515S0020 - ASIC vendors drop prices to rise above COT

This article drops *hints* that IBM's price-cuts include their more advanced processes (0.15 and below), but only for large (100k+ year) volume.

[url]http://www.eetimes.com/story/OEG20021203S0016 [/url] - This article makes statements contrary to what I have posted in the past (about TSMC/UMC not offering any significant design-services.) But in a way, it confirms a suspiscion held by myself and anyone with common sense: Tier-1 clients get 'tier-1' treatment, meaning the vendor will bend over backwards and grant special treatment to win a new large contract, or prevent a competitor from taking away an existing contract.

Here's a specific example: According to the eetimes article, TSMC is handling flipchip-packaging for some of Cisco's chips. That's remarkable because TSMC doesn't actually have flipchip capability in-house. As a matter of fact, most merchant foundries can't handle this themselves (at minimum I know IBM, Toshiba, Fujitsu can do flipchip in-house.) Instead TSMC contracts a third-party packaging/testing house (Amkor) to provide Cisco with this service. It makes me wonder what kind of special arrangement NVidia and TSMC have. NVidia's advanced chips are packaged by Amkor, as well, but who does Amkor directly bill, TSMC or Nvidia?

 

[Nagorak]

Another sign of the bad economy.

 

[RussSchultz]

Here's a specific example: According to the eetimes article, TSMC is handling flipchip-packaging for some of Cisco's chips. That's remarkable because TSMC doesn't actually have flipchip capability in-house. As a matter of fact, most merchant foundries can't handle this themselves (at minimum I know IBM, Toshiba, Fujitsu can do flipchip in-house.) Instead TSMC contracts a third-party packaging/testing house (Amkor) to provide Cisco with this service. It makes me wonder what kind of special arrangement NVidia and TSMC have. NVidia's advanced chips are packaged by Amkor, as well, but who does Amkor directly bill, TSMC or Nvidia?

I didn't realize that TSMC had any packaging services in house. Most fabless companies have their wafers fabbed, then sent to the package house (a separate entity)

 

[asicnewbie]

I didn't realize that TSMC had any packaging services in house.

I honestly don't know. According to TSMC's website, TSMC handles 'ceramic package assembly' in-house, so I guess they can legally claim to offer packaging services. Like you, I've heard that TSMC's in-house packaging capability is close to nil (for production parts.) I've also heard that TSMC has special shipping facilities to expediate transportation to third-party assembly/test houses. In other words, TSMC acts like a single point of contact for the customer, and arranges for the wafers to be tested, diced, packaged, and drop-shipped to the customer. If there are no hitches, the distinction (to the customer) between contracting and doing in-house is transparent...either way the customer pays 1 bill and the same deliverables.

Most fabless companies have their wafers fabbed, then sent to the package house (a separate entity)

That's certainly true in the case of UMC and TSMC customers (the bulk of the merchant foundry market.)

One thing to note, the flip-chip package demands non-trivial design-work -- the routing on the substrate has to be designed/modeled/verified, just like a PCB-layout. For a 1000+ ball part, it's another burden for the customer. Merchant foundries who provide packaging design-service can handle this, as well as the large independent assembly/test houses.