Broadway specs

[INKster]

Not with the IHS still on top of it.

 

[ADEX]

To be 20% more power efficient per clock than Gekko, Broadway would need to run at 7.1W typical/12.0W max. The 970FX does 11W/13W at 1.0GHz. It also would need to incorporate all of Gekko's additional architecture. I just don't think a 970 can emulate 750 hardware at just over twice the clock speed. Developers were writing code right down to the assembly language of Gekko and any differences would make Gamecube games incompatible.

970 wouldn't need to "emulate" the 750 because they are both PowerPC processors and run the same instruction set. There are probably slight incompatibilities and Gekko has extra instructions but it would just need a modified version of the 970 (probably not even modified that much).

There would be different latencies in instructions but that won't break software but could impact performance.

 

[orfanotna]

Gamecube-PPCDBK-EFB486X3- 9314
Wii - BWYC-72914-9316

Do these IBM CPU codes mean anything to anyone?

the first three digits of the numerical parts correspond to the known GC CPU clock speed and the rumored Wii one. So unless this is some really weird coincidence, Wii's CPU clock speed is apparently confirmed.

 

[ninzel]

the first three digits of the numerical parts correspond to the known GC CPU clock speed and the rumored Wii one. So unless this is some really weird coincidence, Wii's CPU clock speed is apparently confirmed.

Ya I saw that clockspeed one,but do the other numbers point to an IBM CPU to compare or will these be Wii specific codes?

 

[OtakingGX]

970 wouldn't need to "emulate" the 750 because they are both PowerPC processors and run the same instruction set. There are probably slight incompatibilities and Gekko has extra instructions but it would just need a modified version of the 970 (probably not even modified that much).

There would be different latencies in instructions but that won't break software but could impact performance.

So you're saying that software written for a G3 will run on a G5 with no modifications?

Generally speaking, it is a mistake to tie specific software features to certain processors. Doing so is necessarily fragile because as new processors come out your code will not grow to take advantage of them. In certain cases, G5 specific code might be required to work correctly on the next processor as well. One example might be using dcbz, for which the size of the cacheline is critical. Code that assumes that only G5 has a 128 byte cacheline, and all others are 32 bytes will fail if another processor arrives that no longer calls itself a G5, but which has 128 byte cacheline size.

http://developer.apple.com/hardwaredrivers/ve/g5.html

I'm sure developers got down to the point that they were using commands that were valid on a PPC 750 but are not on a PPC 970. This would cause problems when trying to run said code.

 

[sfried]

So we have dissassembled Wii's, and still no specs?

 

[pc999]

the first three digits of the numerical parts correspond to the known GC CPU clock speed and the rumored Wii one. So unless this is some really weird coincidence, Wii's CPU clock speed is apparently confirmed.

GC CPU is 485Mhz not 486mhz, or is memory wrong on this?

 

[theafu]

It's about 485/486 as I recall someone stating for timing issues they made it a 3x value of flipper which 162x3=486.

 

[ADEX]

So you're saying that software written for a G3 will run on a G5 with no modifications?

For the normal G3, yes.

I'm sure developers got down to the point that they were using commands that were valid on a PPC 750 but are not on a PPC 970. This would cause problems when trying to run said code.

That's why I said it might need to be modified, if just only to handle Gekko's SIMD instructions.
It can all be done in microcode as well but it's not as fast.

Alternatively they could always use some from of binary translation which replaces the offending instructions at run time.

 

[patroclus02]

Gekko's SIMD instructions ?
As far as I know, it has no SIMD capabilities, just an scalar FP execution unit..

 

[crystall]

Gekko's SIMD instructions ?
As far as I know, it has no SIMD capabilities, just an scalar FP execution unit..

Which can work on pairs of single-precision floating-point numbers stored inside a single double-precision register. Kind of the poor man's SIMD, but still effective for the intended applications at little extra cost.

 

[swaaye]

When I was in college at MTU a few years back, the IBM guys came and showed off Cube before it was launched. They told us about the CPU they customized for it and showed off Waverace. I think I remember them talking about the SIMD capabilities, but I can't remember much of it anymore. It definitely has SIMD tho.

They also had a little raffle of a few of their troubled Deathstar drives lol.

 

[crystall]

I think I remember them talking about the SIMD capabilities, but I can't remember much of it anymore. It definitely has SIMD tho.

You can find more info here: http://pabut.homeip.net:8000/yagcd/chap3.html#sec3.4

 

[feelgood]

I'm surprised that no one has managed to post a link to this yet.

http://xs.to/xs.php?h=xs309&d=06476&f=20061124willchip.jpg

In any case the 7xx series core (Broadway) is incredibly tiny at 90nm. They could have easily gone SoC with this setup i.e. Hollywood + Broadway on the same die with the ~24 MB of 1T-SRAM on the ASIC package (as it exists now)... Makes me wonder if a ~65nm refresh will allow them to do this.

 

[swaaye]

That image is right in the thread a few pages back.

 

[feelgood]

That image is right in the thread a few pages back.

Ah I didn't see it when I was reading through this thread a few days ago...

 

[swaaye]

nm it's over in the WiiGeePeeYou thread.

 

[OICAspork]

Wii Physics

I just caught this video over on gonintendo.com and wanted to share it. From reading the comments I found that this was made with the level editor built into Elebits. My first impression was that the physics were painfully slow, but it seems the person who created this domino scene tweaked the gravity setting to draw out the process. I'd really be interested in seeing it reversed. By increasing the gravity (or scenecomplexity) how much could the Wii handle.

Here is the vid:

and here is a direct link with comments: http://youtube.com/watch?v=hszOo99xL7w

Is embedding possible on B3D?

 

[cubeboy101]

I'm surprised that no one has managed to post a link to this yet.

http://xs.to/xs.php?h=xs309&d=06476&f=20061124willchip.jpg

In any case the 7xx series core (Broadway) is incredibly tiny at 90nm. They could have easily gone SoC with this setup i.e. Hollywood + Broadway on the same die with the ~24 MB of 1T-SRAM on the ASIC package (as it exists now)... Makes me wonder if a ~65nm refresh will allow them to do this.

hi followed this and other wii threads with interest thought id add my pennys worth. iv been looking for pics of wii chips with the shields off and as i thought the 1 tsram-r is embedded on to the same die as hollywood so is it 3mb catch in hollywood and 24mb 1tsram-r ON hollywood if so i dont believe for 1 second that 24mb 1tsram = 3.9gb bandwidth

xbox 360 sub die 10mb edram=32gb
so 24mb on the gpu die MUST AMOUNT TO MORE THAN 3.9gb or have nintendo done it for great latency only i thought embedding would improve both latency and bandwidth

nec/mosys press statment mim2 edram process using mosys 1tsram-r ram 3mb internal 24mb on chip but external

 

[cubeboy101]

what performance advantage do wii get from the combined upgrades of
copperwire
silicon on insulator
stained silicon
shrink of trancistors

as far as i can see broadway has all of the above and iv been told each one gives a chip boost of 30% plus real world performance so if broadway is a 2 times gekko in spec surly theres an extra 50% plus increase in performance from these listed manufacturing processes