Interesting interview with IBM (Cell, backwards compatability...)

[Rolf N]

Fair enough.

Also, with the AMD dual-cores->single-core, it seems to me that AMD is a bit embarrassed about it - otherwise why did enthusiasts have to spend so much effort getting AMD to admit to it?

It cuts their gross margin in half. Investors don't want that happening in significant quantities I suppose.

Which was the first GPU to bin by dead pipes/quads?

R300. A Radeon 9700 with a fragment quad and some other things disabled is a Radeon 9500 (not 9500Pro, that's a completely functional chip).

NVidia has a patent on the subject, which could go back to Geforce 6800:

http://www.beyond3d.com/forum/showthread.php?t=25332

And here's some of ATI's:

http://www.beyond3d.com/forum/showthread.php?t=29119

which seem to be more fine-grained than an entire quad being switched off. Sadly the links to the USPTO in that thread now point at completely different patents!!!!! ARGH.

Jawed

Damn. Sounds really interesting.

 

[arjan de lumens]

Fair enough.It cuts their gross margin in half. Investors don't want that happening in significant quantities I suppose.

Doesn't sound very plausible. Alongside the dual-core-that-occasionally-is-sold-as-single-core "Manchester", AMD has all the time kept on manufacturing "true" single-core chips (the one corresponding to "Manchester" has the codename "Venice"); as such, the dual-core->single-core chips basically just allows AMD to salvage a number of chips that would otherwise need to be discarded completely.

The reason for AMD to be so silent about it is probably more just to avoid having a load of people end up feeling that they are getting ripped off with a partially defective product; this fear may have been rather unfounded, given that the enthusiast community seems to have responded with curiosity rather than consternation, but it is something to consider.

R300. A Radeon 9700 with a fragment quad and some other things disabled is a Radeon 9500 (not 9500Pro, that's a completely functional chip).

9500Pro has two of its four memory controllers disabled, so it's hardly "completely functional". Before that, there was also the Radeon 7000LE, which also had a bunch of on-chip logic disabled (the HyperZ part, but not the actual pipes themselves).

 

[RancidLunchmeat]

The reason for AMD to be so silent about it is probably more just to avoid having a load of people end up feeling that they are getting ripped off with a partially defective product; this fear may have been rather unfounded, given that the enthusiast community seems to have responded with curiosity rather than consternation, but it is something to consider.

Reminds me of the bit in this article directly following the yields question which was a failure rate question. Essentially they asked 'Ok.. if you're using 7 SPE cells because you want there to be some redundancy (that's how I read it anyway), what happens when one of the 7 SPEs fail on the chip that was originally supposed to have 8 SPEs?'

The answer was obvious: 'Well, then its broken and won't play your games anymore' I got a kick out of the straight forward obvious answer.

 

[SPM]

Thanks Sugarcoat for the exact answer.

In terms of scaling, let say they have even a 25% yield return. For 3 million working chips, they'll have to produce 12million and figure out what to do with other 9million. None of this chips can obviously be used for a lesser sku's. His comment about "not throwing away the 6spe chips" alludes to me that Sony has no use for them.

I wonder if the Cell is customized in the PS3 to the point that failed chips cannot be used for other applicatons?

I would say the IBM guy meant either 20% yield of 8 SPE chips and 40% yield of 7 SPE chips or better (since 50% of Cell is SPEs), or 20%-40% yield of 8 SPE chips. These are not catastrophic.

Most of the sub 7 SPE chips (possibly down to 2 to 4 SPEs will be used. Toshiba is planning to put Cell in all it's HDTVs. Other uses are set top boxes etc. Sony and other HDTV manufacturers are likely to do the same.

What does Cell do in a HDTV? Some nifty things like decoding multiple Mpeg4 streams for watching one channel while you record another, or displaying several channels on the screen simultaneously, one full size and the others scaled down as movie thumbnails. Other things are buffering video into XDRAM for instant replay features, functioning as a PVR with the addition of a hard drive and doing up and downscaling, and controlling the HDTV user interface. Refer to
www.hotchips.org/archives/hc17/2_Mon/HC17.S1/HC17.S1T3.pdf

A 7 or 8 SPE Cell seems an overkill for most HDTVs though, and certainly set top boxes, and so there is probably a market for Cell chips with down to even 2 SPEs.

 

[SugarCoat]

I would say the IBM guy meant either 20% yield of 8 SPE chips and 40% yield of 7 SPE chips or better (since 50% of Cell is SPEs), or 20%-40% yield of 8 SPE chips. These are not catastrophic.

Most of the sub 7 SPE chips (possibly down to 2 to 4 SPEs will be used. Toshiba is planning to put Cell in all it's HDTVs. Other uses are set top boxes etc. Sony and other HDTV manufacturers are likely to do the same.

What does Cell do in a HDTV? Some nifty things like decoding multiple Mpeg4 streams for watching one channel while you record another, or displaying several channels on the screen simultaneously, one full size and the others scaled down as movie thumbnails. Other things are buffering video into XDRAM for instant replay features, functioning as a PVR with the addition of a hard drive and doing up and downscaling, and controlling the HDTV user interface. Refer to
www.hotchips.org/archives/hc17/2_Mon/HC17.S1/HC17.S1T3.pdf

A 7 or 8 SPE Cell seems an overkill for most HDTVs though, and certainly set top boxes, and so there is probably a market for Cell chips with down to even 2 SPEs.

He did not say 20% or 20-40% yields on fully functioning processors, he said 10-20% which is a rather large difference. Its pretty straight forward. And when all those TVs and other products start to ship with a Cell processor, contracts are signed and Sony can write them off, you let me know okay? Until then its junk silicone at Sony's expense which is very bad news. Its already bad news that the yields are so low considering they need essentially a fully working Cell processor. Dont expect the allowance of the 1 defective SPE to improve yields much. 40% is much too high. For a total i'd be shocked if they were far above 30% for 7 and 8 SPE yields combined. The rest being either totally trash or mostly working. Why are you spinning this as if its no problem and being lenient on what everyone else with two eyes can see as bad news?


What i expect to happen is Sony to set a limit on what they can take as losses while also doing a respectable launch. We may see supply of the consoles dwindle after launch until yields improve. A fast jump to 65nm can also be expected since they'll want to try to get as many working processors per wafer as possible to reduce the loss they're taking. They're less then 6 months away from launch, this news wouldnt be so bad if it was back in 2005.

 

[RancidLunchmeat]

I would say the IBM guy meant either 20% yield of 8 SPE chips and 40% yield of 7 SPE chips or better (since 50% of Cell is SPEs), or 20%-40% yield of 8 SPE chips. These are not catastrophic.

I would say the 10-20% yield is definately referring to 8 SPE chips. If logical redundancy refers to the use of Cells with a crippled SPE (which I believe), then we could double the yield to 20-40% for PS3 suitable Cells

Most of the sub 7 SPE chips (possibly down to 2 to 4 SPEs will be used.

Then why would he say "Reeves: There are a lot of chips with six cores operational, and we’ve been thinking about whether we should really throw all of those away" ?

Actually, re-reading the interview (again and again) it becomes very confusing what he means by redundancy. Either that, or he wants us to believe that IBM has a great deal of orders from the defense and medical fields.

He specifically states that the Cells with all 8 SPE have a different part number and aren't going into the PS3, but are going to medical, aerospace and defense contracts.

Isn't that kind of puzzling if IBM's fab 'goal' is 8 SPE and the chips that hit that goal (10-20% currently) are filling supply orders other than the PS3? Which means the only chips that are going into the PS3 are "exact failures" with a single crippled SPE.

If that's the case, with his comment of 'lots' of 6 SPE chips, I'd say yields for the 7 SPE cell would likely be rather low.

 

[Carl B]

This thread already exists here, but that said personally I don't think the logic redundancy refers to an extra SPE; rather just in-built, well, logic redundancy...

Yield percentages should be for 8-SPE chips, so with the 'doubling' I would think the 20-40% he alludes to for 8-SPE chips. And being able to go with 7-SPEs vs 8 should do well to raise that percentage quite a bit higher. Contrary to SugarCoat's post, I don't see where being able to fully absord single defects occuring over ~66% of the die area won't lead to significantly greater yields.

Kutaragi (and you can choose not to trust him) has already gone on record saying they basically have all the Cells they need for launch, so I really don't think any PS3 'crises' will stem from there. Contrary to what the Inquirer would love for us to believe.

 

[BenSkywalker]

Sony has their own fab that was built for the primary purpose of handling Cell production. It may surprise some people, but this is a different facility then IBM's fab and is controlled by Sony.

Maybe they have a different approach then most, but I tend to assume that when a company drops billions of dollars to build something for the main purpose of producing a particular item I don't assume they will then contract out the production of that item to one of the least effective producers in the world.

 

[Carl B]

Well, Sony's Cells are being sourced from both their own Nagasaki fab (in the near future) and from IBMs East Fishkill (of which Sony commands some of the yield due to an investment in that fab).

Most - if not all - Cells to date have originated from IBM thus far though.

 

[Arty]

This thread already exists here, but that said personally I don't think the logic redundancy refers to an extra SPE; rather just in-built, well, logic redundancy...

Logic redudancy like? As much as we know about the CELL, the only conclusion we can draw about this redundancy is in relation to the SPUs. Kind of reminds me of the Jawed's theory about R580 having 64 shaders instead of 48.

Kutaragi (and you can choose not to trust him) has already gone on record saying they basically have all the Cells they need for launch, so I really don't think any PS3 'crises' will stem from there. Contrary to what the Inquirer would love for us to believe.

I remember Kutaragi also saying that he had all the BR drives for the PS3 launch already. Put those two statements together and can I expect more than 2 million PS3s at launch please? And this is not just Inquirer but everybody's outlook on this particular topic is of the same tone - the figures for the yeilds are not encouraging.

 

[Carl B]

Logic redudancy like? As much as we know about the CELL, the only conclusion we can draw about this redundancy is in relation to the SPUs. Kind of reminds me of the Jawed's theory about R580 having 64 shaders instead of 48.

Well, no... not like that, but like how the cache in most chips is able to absord a defect here and there because of it's innate 'redundancy.' It's a vague statement, either way - it's just the way I interpreted it. Otherwise why would he be wondering whether Intel does the same thing for their 'logic,' and think IBM is alone if just as you describe, the GPU makers do it all the time on identical sub-units? Unfortunately for us, he doesn't clarify whether the jump in yields is for Cells destined for PS3, or for Cell in general, which would imply 8-SPE chips.

I remember Kutaragi also saying that he had all the BR drives for the PS3 launch already. And this is not just Inquirer but everybody's outlook on this particular topic is of the same tone - the figures for the yeilds are not encouraging.

Why do you say they're not encouraging though? What do *you* think the yields should be for a console launch?

I mean - the fact is although ~30% sounds low, it's really only the cost per chip that matters in the end. And so what is the cost per chip at that yield? You say it's not just the Inquirer, but it's the Inquirer drawing it from everyone, who draw onit from the Inquirer, etc etc... I mean let's make no mistake; when the IBM VP was talking about the Cell yields, he was talking about that doubling as a 'good' thing, not indicative of any sort of tragic situation.

PS - When was that Blu-ray comment from KK though? I don't remember it, but I'll try to find the Cell one for the thread.

PPS - Upon thinking on it further, I guess he probably must mean the SPE's, but truthfully have the stuff Reeves says makes things more confused than they were before. Why in the world was he referencing Intel and all that? And why complicate the issue by jumping around in terms of what SPE configuration he's talking about? It's frustrating. Anyway but my second response part still stands.

 

[Arty]

Well, no... not like that, but like how the cache in most chips is able to absord a defect here and there because of it's innate 'redundancy.' It's a vague statement, either way - it's just the way I interpreted it. Otherwise why would he be wondering whether Intel does the same thing for their 'logic,' and think IBM is alone if just as you describe, the GPU makers do it all the time on identical sub-units? Unfortunately for us, he doesn't clarify whether the jump in yields is for Cells destined for PS3, or for Cell in general, which would imply 8-SPE chips.

He doesnt clarify, so your assumption on the yeild figures are as much speculative as the rest.

Why do you say they're not encouraging though? What do *you* think the yields should be for a console launch?

I mean - the fact is although ~30% sounds low, it's really only the cost per chip that matters in the end. And so what is the cost per chip at that yield?

Besides the fact that even you admit the figure sounds low? No.

You say it's not just the Inquirer, but it's the Inquirer drawing it from everyone, who draw onit from the Inquirer, etc etc... I mean let's make no mistake; when the IBM VP was talking about the Cell yields, he was talking about that doubling as a 'good' thing, not indicative of any sort of tragic situation.

PS - When was that Blu-ray comment from KK though? I don't remember it, but I'll try to find the Cell one for the thread.

No, everybody is drawing from the ElectronicNews, not Inquirer. If you look around, you'll see two articles from Dailytech and Ars on this very same topic and their own (similar) conclusions.

I'll see if I can find that BR quote from KK.

 

[Carl B]

He doesnt clarify, so your assumption on the yeild figures are as much speculative as the rest.

Well, I never said otherwise.

Besides the fact that even you admit the figure sounds low? No.

Who knows? I'm sure if someone told me the yield rate for the R580, that'd probably sound even lower. I have no idea what I *expect* yield-rates to be, save that I expect smaller mass-market chips the likes of which AMD and Intel pump out to have relatively high rates.

I have no expectations on Cell's rates; rather, what do said rates equate to in price? If 40% rates equals a $75 chip, well I think we can agree that there's no real crises... so we have to make sure the tail doesn't wag the dog on this issue.

No, everybody is drawing from the ElectronicNews, not Inquirer. If you look around, you'll see two articles from Dailytech and Ars on this very same topic and their own (similar) conclusions.

Well, I mean I'm not trying to get down on those news sources, but their opinions don't really mean that much to me. I read Dailytech and Ars frequently enough to know they are a much better source of tech news than tech analysis. I mean I give respect to Anand and Hannibal the individuals, but how often are they actually involved in what goes up?

I'll see if I can find that BR quote from KK.

Sounds good; here's the Cell one while we're here:

Q: Does that include the “Cell” semiconductors?

Kutaragi: No worries there. We began the manufacturing process last year (summer 2005), and now have plenty of them – enough to sell on the street, even. We’re hoping to provide servers using Cell’s on our side of the network in the very near future, so the more we have, the better. What was actually more troublesome was securing the generic parts required. As the economy is strong now, we had a hard time securing all the necessary parts to meet a 1 million unit / month quota – passive components, RAM, hard drives, circuit board materials, and even plating alloys.

http://techon.nikkeibp.co.jp/english/NEWS_EN/20060608/117992/?P=2

 

[Arty]

Who knows? I'm sure if someone told me the yield rate for the R580, that'd probably sound even lower. I have no idea what I *expect* yield-rates to be, save that I expect smaller mass-market chips the likes of which AMD and Intel pump out to have relatively high rates.

I have no expectations on Cell's rates; rather, what do said rates equate to in price? If 40% rates equals a $75 chip, well I think we can agree that there's no real crises... so we have to make sure the tail doesn't wag the dog on this issue.

The problem with comparing CELL to R580 is that one is supposed to be a mass market chip where the number required for just the lauch is in the millions. That is probably more than the launch quantities of mass-market chips from Intel and AMD.

Well, I mean I'm not trying to get down on those news sources, but their opinions don't really mean that much to me. I read Dailytech and Ars frequently enough to know they are a much better source of tech news than tech analysis. I mean I give respect to Anand and Hannibal the individuals, but how often are they actually involved in what goes up?

Well my point was the outlook from all the corners looked the same unless some one in the know how clears it up for all of us. Dropping a tidbit like that they should have expected the obvious reaction.

Sounds good; here's the Cell one while we're here:

http://techon.nikkeibp.co.jp/english/NEWS_EN/20060608/117992/?P=2

Its taking time for me to dig KK's comment on BR drives, I hope that was wishful thinking on my part. Hopefully I'll get the link soon.

 

[Crossbar]

Just to put things in perspective:

Do you have any idea of what the yield will be?

Kutaragi: "I'm not going to give a green light unless we attain a certain yield rate level. Just think of the amount of chips we are to produce - 20 million for game consoles alone, an estimated 10% of TV sets, as well as home servers. At this scale, brute strength alone won't do. We are not aiming to produce 100,000-yen chips. As Mr. Masatoshi Shima, who had designed the "4004" chip with Intel once wrote, Intel usually starts with the yield of 40% and then brings it up to 85%. That is a good curve. I believe there is universality in these figures that stands up regardless of time and use."

http://techon.nikkeibp.co.jp/english/NEWS_EN/20050426/104211/

If they have around 40% yield of 7 or more workings SPUs it's seems like Ken will be happy to start with that.

 

[PiNkY]

Because he also said that this type of logic redundancy hadn't been done before. I don't know about you, but I find "dud quads" in a graphics chip very comparable to a borked SPE, and I'm also pretty sure the guy had heard about ATI and NVIDIA doing that kind of thing. Still he made that claim.

That's why.

The only reference in the interview I can find is:

...If you put logic redundancy on it, you can double that. It’s a great strategy, and I’m not sure anyone other than IBM is doing that with logic...

Is this the statement you allude to? To me it just doesn't sound like "look we have some entirely new approach to redundancy on this ic". IBM has used that approach for years. I.E. afaik their Z-Series cpu comes with twin ALUs, each perfoming all operations in parallel with an equal check for each retired op. If this fails, the whole CPU is flagged damaged and a spare unit takes over on-the-fly.

 

[Platon]

Just to put things in perspective:

http://techon.nikkeibp.co.jp/english/NEWS_EN/20050426/104211/

If they have around 40% yield of 7 or more workings SPUs it's seems like Ken will be happy to start with that.

But that is the problem, this should not be the start. Those are the yields they should have had last year when they started making them, now they should be approaching the 85% figure according to the link...

 

[Crossbar]

But that is the problem, this should not be the start. Those are the yields they should have had last year when they started making them, now they should be approaching the 85% figure according to the link...

You have a point there.

After rereading the article I lean on believing he means som kind of fine grain logic redundancy. The increase in transistors between DD1 and DD2 may have been used for this. If I go even more conspiracy minded, this may have been the reason that Kutaragi was not allowed to show the new Cell die shot at his speach at ISSCC-06.

EDIT: Giving it a second thought. I think the SPU logic would be ideal for logic redundancy. Given the fact that it is organised around 128 bit registers for vector arithmetic. For example 4 floats, 8 int16s and 16 bytes can be computed in paralell. If you add one more float multiplication unit to the existing 4 it's just a 25% increase in transistor count. If you add an extra byte arithmeitc unit to the existing 16 it's just a 6 % increase.

 

[Jawed]

EDIT: Giving it a second thought. I think the SPU logic would be ideal for logic redundancy. Given the fact that it is organised around 128 bit registers for vector arithmetic. For example 4 floats, 8 int16s and 16 bytes can be computed in paralell. If you add one more float multiplication unit to the existing 4 it's just a 25% increase in transistor count. If you add an extra byte arithmeitc unit to the existing 16 it's just a 6 % increase.

Look at DD2 as I posted ealier:

http://www-03.ibm.com/chips/photolibrary/photo10.nsf/WebViewNumber/ED994790FAECFD6900256FEA0062126B

Fours, not fives. At the bottom right under options, there's the option to download the full high resolution version of the picture.

Jawed

 

[macabre]

I have a (maybe stupid) question.
On 7-SPE cells, will there be a difference when f.e. 1 cell has SPE nr.1 disabled and another one has nr.4 disabled as they are connected to a ring bus ?
In some of IBMs paper it says that the sequence of how SPEs are adressed on the ring bus is important on performance, that`s why I ask.