Sun's RDRAM GPU; do you believe in MAJC?

[elimc]

I posted this in another forum but no one responded:

Although it only uses one channel of RDRAM I suppose this is probably the first high end graphics cards for the workstation market with PC800 RDRAM. Although it only has one channel, it is not bandwidth constrained because it is meant for CAD/CAM applications. It features 380MB of RAM. The RAM comes in three flavors: 3DRAM, DRDRAM, and SDRAM.

This is a very interesting GPU indeed as it is based on the MAJC processor: an attempt by Sun to bring CMP to RISC. This is their first version of MAJC (MAJC 5200).

Summary:
http://www.aceshardware.com/#55000465

MAJC Ardhitecture Whitepaper:
http://www.sun.com/processors/whitepapers/majcintro.html

Picture and official decription of GPU:
http://www.sun.com/processors/MAJC/03.SME.125ProdBul.pdf

Notice the "Includes Rambus Interface"

 

[mboeller]

This is a very interesting GPU indeed as it is based on the MAJC processor: an attempt by Sun to bring CMP to RISC. This is their first version of MAJC (MAJC 5200).

Thanks for the links.

<rant>

From what I know about the MAJC5200 (which is not so much) this CPU seems to be "a little bit" to much for the task. It seems SUN hat to find an application ( = graphics-card ) for the product ( = majc ), cause they don't want to use this CPU as an CPU. And so this processor is a little bit overengineered for the task, cause an simple SIMD-FP-DSP/ASIC should be able to do the T&L as good as the MAJC 5200 and would be far cheaper.

The interesting part of the new graphics-card is that SUN uses 3DRAM, and so most blending and 3D related tasks are done within the RAM.
But overall the design of this card seems bulky. A few ASIC's, RAM and chips are plugged together which were never ment to work together. Especially the 3 different RAM's within one graphics-pipeline seem ugly ( the RDRAM is only included cause the MAJC is not able to work with other RAM, the SDRAM is here cause it is cheap, the 3D-RAM seem to augment an 3D-chips without features ... )

 

[elimc]

Well, it is their first attempt, and they are combining quite a few things together. SMP on a RISC chip can't be all that easy. Perhaps they'll streamline it in their nextgen card. Has there ever been a RISC based graphics card?

Why won't MAJC work with other RAM types. I'm sorry, I suppose I'm a bit fuzzy with RISC and MAJC.

 

[Thowllly]

Well, it is their first attempt, and they are combining quite a few things together. SMP on a RISC chip can't be all that easy. Perhaps they'll streamline it in their nextgen card. Has there ever been a RISC based graphics card?

Why won't MAJC work with other RAM types. I'm sorry, I suppose I'm a bit fuzzy with RISC and MAJC.

SMP on RISC is no more difficult than SMP on CISC. MAJC only works with RDRAM because the memory controller is integrated into the core.

 

[elimc]

I was under the impression that it was quite a bit tougher to mix hyperthreading and RISC together.

 

[PrzemKo]

Maybe they found that their idea of keeping as little of "silicon" idle as possible works best with 3D? Not many branches here, relatively easy to predict memory access, commands that can be executed via "pure" logic instead of bunch of micro-ops stored in ROM...