AmigaOS 4.0/AmigaONE ars review

It's cool because it's an Amiga ;) The JIT compiler sounds like a good move for emulating the older games, but I'm unconvinced developers will want yet another "console" to devleop for.

Still, it has a lot of cool little features that make it much better than your standard Console. It's a nice bridge product, not quite a full PC but much more than a simple console. Web browser, an explorer-like interface with access to the local drives, MP3 player; they all give a much more upscale feel to the device. I also like the ramdrive function once the OS is loaded.

Man, that first page was borderline difficult to read with all the varying japanese company names ;)
 
AmigaOS rocked, in a geeky sort of way, it was always impressive what could be done with so little, and shows how much MS doesn't rock to me.. lol
 
Yeah, it's technically a G3 runs on crippled down G4-base.

BTW IT"S THE SAME HW I've sen tested years ago - Amiga is DEAD.
 
RussSchultz said:
Heh. Its already 4 years out of date.
Sheesh, us Amigans are used to being more out of date than that! :p

I sat on a 14.3MHz 68k system up until june or july of 97 when I switched over to the dark side.
 
T2k said:
Yeah, it's technically a G3 runs on crippled down G4-base.

BTW IT"S THE SAME HW I've sen tested years ago - Amiga is DEAD.

What's the difference between G3 and G4? SIMD extensions?

I sat on a 14.3MHz 68k system up until june or july of 97 when I switched over to the dark side.

Wow, that was like 7 years out of date. What was that cpu equivilant to, about a 486DX-66?
 
Fox5 said:
T2k said:
Yeah, it's technically a G3 runs on crippled down G4-base.

BTW IT"S THE SAME HW I've sen tested years ago - Amiga is DEAD.

What's the difference between G3 and G4? SIMD extensions?

G4 has HW AltiVec instruction set support (one or two units, can't recall) as most important feature development, moreover has longer queue, double-precision FPU, new memory subsystem, bigger and better cache.
 
T2k said:
Fox5 said:
T2k said:
Yeah, it's technically a G3 runs on crippled down G4-base.

BTW IT"S THE SAME HW I've sen tested years ago - Amiga is DEAD.

What's the difference between G3 and G4? SIMD extensions?

G4 has HW AltiVec instruction set support (one or two units, can't recall) as most important feature development, moreover has longer queue, double-precision FPU, new memory subsystem, bigger and better cache.

So um...what's queue do? Double precision FPU I guess means it can calculate 64 bit float point values(so G3 was fully 32bit?), how did memory subsystem change, it still used SDR ram. And bigger cache is easy to understand, but how was it better? Faster/more efficient?
I'm more interested in seeing how the Gecko(which is G3 based with upgrades) compares to the G4, the Gecko sounds roughly equivilant to the G4 though. It has its own SIMD instructions, faster FSB, memory subsystem enhancements, I believe a double-precision FPU, and faster speed and more cache than I think any G3s had.
So why was it motorola who developed the G4 and not IBM? I heard due to differences in what they wanted the SIMD instructions to do, but that doesn't seem like a big enough issue for Apple not to depend on IBM over motorola.
 
Fox5 said:
T2k said:
Fox5 said:
T2k said:
Yeah, it's technically a G3 runs on crippled down G4-base.

BTW IT"S THE SAME HW I've sen tested years ago - Amiga is DEAD.

What's the difference between G3 and G4? SIMD extensions?

G4 has HW AltiVec instruction set support (one or two units, can't recall) as most important feature development, moreover has longer queue, double-precision FPU, new memory subsystem, bigger and better cache.

So um...what's queue do? Double precision FPU I guess means it can calculate 64 bit float point values(so G3 was fully 32bit?), how did memory subsystem change, it still used SDR ram. And bigger cache is easy to understand, but how was it better? Faster/more efficient?
I'm more interested in seeing how the Gecko(which is G3 based with upgrades) compares to the G4, the Gecko sounds roughly equivilant to the G4 though. It has its own SIMD instructions, faster FSB, memory subsystem enhancements, I believe a double-precision FPU, and faster speed and more cache than I think any G3s had.


Well, I'm home now so you're lucky, I have all my bookmarks handy - here you'll get all the answers: http://www.xlr8yourmac.com/G3CARDS/XLR8G4/G4vsG3.html

8)

So why was it motorola who developed the G4 and not IBM? I heard due to differences in what they wanted the SIMD instructions to do, but that doesn't seem like a big enough issue for Apple not to depend on IBM over motorola.

Motorola is VEYR slow and did not develop anything since G4 but shrinked its die size via lower manuf process and put extra large cache in some modells, energy savings etc - but that's it.

On the other hand IBM was always the brain behind the Power architecture.
 
On the other hand IBM was always the brain behind the Power architecture.

But why not the G4?

And looks like the only significant upgrade G4 offered over G3 was the SIMD instructions, and faster FPU calculations but that didn't offer nearly as big a performance increase.
Cache is much faster, but it didn't seem to affect performance.
 
Fox5 said:
On the other hand IBM was always the brain behind the Power architecture.


But why not the G4?

And looks like the only significant upgrade G4 offered over G3 was the SIMD instructions, and faster FPU calculations but that didn't offer nearly as big a performance increase.

G$ is way faster than G3, clock by clock.

Cache is much faster, but it didn't seem to affect performance.

? When you have a slow memory subsystem, cache is crucial. BTW IIRC G3 introduced the dual CPU as well as the L3 cache.
 
T2k said:
Fox5 said:
On the other hand IBM was always the brain behind the Power architecture.


But why not the G4?

And looks like the only significant upgrade G4 offered over G3 was the SIMD instructions, and faster FPU calculations but that didn't offer nearly as big a performance increase.

G$ is way faster than G3, clock by clock.

Cache is much faster, but it didn't seem to affect performance.

? When you have a slow memory subsystem, cache is crucial. BTW IIRC G3 introduced the dual CPU as well as the L3 cache.

Well on some benchmarks at that site you linked it seemed that there were huge increases with SIMD(sometimes as much as twice the performance per mhz), but barely any increases without. The largest increase was like a 10% overall increase in FPU performance.

BTW IIRC G3 introduced the dual CPU as well as the L3 cache.

Do you mean to apple products, home computers, or the computing world in general? And is an L3 cache fundamentally any different than an L2 cache?
 
Fox5 said:
T2k said:
Fox5 said:
On the other hand IBM was always the brain behind the Power architecture.


But why not the G4?

And looks like the only significant upgrade G4 offered over G3 was the SIMD instructions, and faster FPU calculations but that didn't offer nearly as big a performance increase.

G$ is way faster than G3, clock by clock.

Cache is much faster, but it didn't seem to affect performance.

? When you have a slow memory subsystem, cache is crucial. BTW IIRC G3 introduced the dual CPU as well as the L3 cache.

Well on some benchmarks at that site you linked it seemed that there were huge increases with SIMD(sometimes as much as twice the performance per mhz), but barely any increases without. The largest increase was like a 10% overall increase in FPU performance.
Somehow true but keep in min there wasn't any really memory intensive test (lie video encoding).
Not to mention the fact that G4 was the first DDR-enabled Apple system too.

BTW IIRC G3 introduced the dual CPU as well as the L3 cache.

Do you mean to apple products, home computers, or the computing world in general?

Of course Apple only. :)

And is an L3 cache fundamentally any different than an L2 cache?

WHy shuld be fundamentally different? :?:
 
Not to mention the fact that G4 was the first DDR-enabled Apple system too.

More out of necessity, I don't think 166mhz sdr ram was ever made. I'd suppose the pci and agp buses benefit from the extra bandwidth, but that's a really small benefit, plus they end up getting higher latency from using ddr over sdr.

WHy shuld be fundamentally different?

Dunno, you just seemed to mention it as a big accomplishment, in that case should we be impressed it a cpu launches with an L4 cache? Actually, judging by the P4 EE's L3 cache an L4 cache would be quite pointless. The bandwidth and latency would probably be at the same level as system ram.
 
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