NVidia Ada Speculation, Rumours and Discussion

[Picao84]

Is it that much different to being able to pair a RTX3090 with a 2-core/2-thread Celeron using the motherboard's chipset-driven PCIe 3.0 x4 slot that is usually full sized?
Or pairing a 5700G APU with just one module of DDR4-1600?

I don't think it's comparable, as a GPU is not bundled with a CPU..

 

[xpea]

But some rumors say TSMC N5 is the choice for RTX 40 since SEC's processes aren't yielding well.

Is it the same source who said that SEC couldn't produce big Ampere dies at any sufficient quantity?
Today yields are good at Samsung. Not exceptional as TSMC 5nm but NV is not restricted by SEC and huge price difference compensate

 

[Lurkmass]

None of them are ideal of course; a 512bit bus has its own costs; as does a big LLC as we can see from RDNA2 having a deficit in deferred titles at high resolutions (wonder what effect a visibility buffer has on that). Regardless, for performance increases they're also heavily constrained by power. Even jumping from Samsung 8nm to TSMC 5nm there isn't enough power savings to double performance, so unless there's a major architecture shift simultaneously that notion is out.

As a guess, lower end of expectations is a switch to a big LLC and a 25% performance improvement (averaged) with a switch to GDDR6 to save money. But better is always possible.

Ultimately, the future of hardware design is going to depend on what kind of rendering architecture developers are going to make ...

Going for a larger bus-width leaves a smaller window of improvement for shading performance because of higher fixed power consumption so this change will negatively skew renderers that rely on forward shading or more complex single pass shading. Using an on-chip cache makes the memory hierarchy more complex which will mean that deferred shading becomes more sensitive against the size of the G-buffer but power consumption becomes more manageable in this scenario ...

The idea behind a visibility buffer is to do an "early split" in the shading pipeline so it's compatible with either deferred or forward shading along with many their respective benefits/drawbacks ...

 

[no-X]

Today yields are good at Samsung.

"Samsung Electronics’ state-of-the-art V1 Line at Hwasung Campus still has yield problems, with the yield of some 5-nm products remaining below 50 percent, multiple industry insiders said on July 4."
http://www.businesskorea.co.kr/news/articleView.html?idxno=71056

Samsung's 4LPA seems to be renamed 5LPA and the leaked roadmap more or less confirms that (5LPA disappeared, 4nm generation appeared). It also confirms that 3GAE was cancelled (that means that the first Samsung's GAA proces is postponed to 2023).

 

[Kaotik]

[semiot]
If I'm not mistaken, Lovelace codename was already confirmed for something other than GPU architecture.
The whole confusion started when some leaker just dropped the codename with no references to what it was and the rumorboat started sailing because clearly NVIDIA has codenames only for GPU architectures
[/semiot]

 

[xpea]

"Samsung Electronics’ state-of-the-art V1 Line at Hwasung Campus still has yield problems, with the yield of some 5-nm products remaining below 50 percent, multiple industry insiders said on July 4."
http://www.businesskorea.co.kr/news/articleView.html?idxno=71056

I was talking about current 8nm Nvidia is using. For next gen, Samsung still has a full year to improve the EUV nodes

 

[Deleted member 90741]

"Samsung Electronics’ state-of-the-art V1 Line at Hwasung Campus still has yield problems, with the yield of some 5-nm products remaining below 50 percent, multiple industry insiders said on July 4."
http://www.businesskorea.co.kr/news/articleView.html?idxno=71056

Samsung's 4LPA seems to be renamed 5LPA and the leaked roadmap more or less confirms that (5LPA disappeared, 4nm generation appeared). It also confirms that 3GAE was cancelled (that means that the first Samsung's GAA proces is postponed to 2023).

I think most rumors and reports from Taiwan suggests NV going with N5 as well.
But if there is something to be learnt, going with 8N was a brilliant idea because of uncontested wafer allocation.
So I would hazard a guess it will be a split between N5 and 5LPE/5LPP for NV. For Auto it is already known the process for the next gen Tegra devices would be 8LPP+/8LPA
AMD also rumored to be going with N5P and N6 (Different Fab lines).

Also official information(I have a link but it is paywalled), says 5LPP not 5LPA. 8LPA is there however.

 

[itsmydamnation]

"Samsung Electronics’ state-of-the-art V1 Line at Hwasung Campus still has yield problems, with the yield of some 5-nm products remaining below 50 percent, multiple industry insiders said on July 4."
http://www.businesskorea.co.kr/news/articleView.html?idxno=71056

Samsung's 4LPA seems to be renamed 5LPA and the leaked roadmap more or less confirms that (5LPA disappeared, 4nm generation appeared). It also confirms that 3GAE was cancelled (that means that the first Samsung's GAA proces is postponed to 2023).

Samsung disagrees with GAE being cancelled
https://www.anandtech.com/show/16815/samsung-deployment-of-3nm-gae-on-track-for-2022

For GAA technology, 3GAE is absent from the roadmap, but 3GAP is there. We reached out to Samsung and a representative confirmed that the 3GAE technology is still on track for ramp in 2022. From the slide, we can see that MBCFET-based 3GAP will enter its HVM phase sometime in 2023.

 

[DegustatoR]

Go back to GDDR6, which is now as fast as GDDR6x

Is it? Last time I checked G6 topped out at 18Gbps while G6X could hit 21.

 

[Frenetic Pony]

Is it? Last time I checked G6 topped out at 18Gbps while G6X could hit 21.

20gbps has been announced for this year, at least the intention to start production. Considering the apparent cost and yield issues of GDDR6X, with no particular speed advantage as even the 3090 only hits 19.5gbps, it doesn't seem to make a lot of sense to stick with 6x

 

[DegustatoR]

20gbps has been announced for this year, at least the intention to start production. Considering the apparent cost and yield issues of GDDR6X, with no particular speed advantage as even the 3090 only hits 19.5gbps, it doesn't seem to make a lot of sense to stick with 6x

Could you point me to the announcement? The only thing I see on 20Gbps G6 is an OC thing from Micron from 2018.

 

[Phantom88]

I hope it doesn't take that long to come out. There's speculation in the RDNA3 thread of RDNA 3 landing by end of Q1 next year.

Nvidia's roadmap for "ampere next and ampere next next" puts them at 2 year cycles. Same launch as Ampere, around sept 2022 and sept 2024. I'd say the launch is also depending on what AMD does. Nobody is gonna launch the next gen in 2023 and leave AMD to have the performance crown if they have rdna 3 for 2022.

 

[Bondrewd]

Samsung disagrees with GAE being cancelled

They also disagree with their EUV usage being shit, but it is.
3GAE is ded.

 

[CarstenS]

Obviously this isn't coming to Lovelace, but with PCIe 6.0 bringing 128GB/s duplex (256GB/s raw) and DDR5 hitting ~100GB/s in a 2-module configuration, I wonder if we'll start seeing DRAM-less midrange GPUs that only bring large amounts of stacked LLC.

Do you hear Intels i740, TurboCache and Hypermemory silently weep?

 

[itsmydamnation]

They also disagree with their EUV usage being shit, but it is.
3GAE is ded.

how dead is dead?
gone dead,
cannonlake / intel first gen 10nm dead
or like TSMC 20nm dead ( it just wasn't good, so no one really used it (yes i know phone soc's did and some random SPARC chips))

 

[JasonLD]

how dead is dead?
gone dead,
cannonlake / intel first gen 10nm dead
or like TSMC 20nm dead ( it just wasn't good, so no one really used it (yes i know phone soc's did and some random SPARC chips))

3GAE probably gonna be used for their own Exynos, just not for the customers I think.

 

[Bondrewd]

cannonlake / intel first gen 10nm dead

Basically this give or take.
If we're extra lucky it gets the 14LPE treatment aka usable but nowhere near cost competitive.

like TSMC 20nm dead

Ironically enough N3 is N20 remake and everyone is using it.
Fucking a rotting carcass ain't fun it seems...

 

[Deleted member 13524]

Do you hear Intels i740, TurboCache and Hypermemory silently weep?

The i740 did have dedicated memory.. was it able to allocate system memory?
The other two had terrible 3D performance indeed, but it was sufficient for the low-end office and multimedia needs, in a time when the GMA900 had no H264 or VC-1 acceleration.

Regardless, my comment was related to the eventual rise of 3D-stacked LLC in GPUs and the acceleration of PCIe bandwidth.
In a little over 2 years we should have 128GB/s duplex bandwidth from a PCIe 16x connector and more than 128GB/s over a 2-DIMM DDR5 motherboard.

Assuming 3D-stacking and cache ICs get cheaper as adoption rises, it could be more cost-efficient to get a midrange GPU that uses e.g. a 3D-stacked cache of 256MB covering over 75% of the bandwidth needs in a gaming load, and then just use the PCIe at ~100-120GB/s to cover the rest.

Perhaps this still isn't possible with PCIe 6.0 and DDR5, but on each iteration of PCIe and GPU architectures with larger LLC chunks I think we're getting closer to VRAM-less architectures.

Ironically enough N3 is N20 remake and everyone is using it.
Fucking a rotting carcass ain't fun it seems...

Rotting carcass being.. N5?

 

[DegustatoR]

Regardless, my comment was related to the eventual rise of 3D-stacked LLC in GPUs and the acceleration of PCIe bandwidth.
In a little over 2 years we should have 128GB/s duplex bandwidth from a PCIe 16x connector and more than 128GB/s over a 2-DIMM DDR5 motherboard.

Assuming 3D-stacking and cache ICs get cheaper as adoption rises, it could be more cost-efficient to get a midrange GPU that uses e.g. a 3D-stacked cache of 256MB covering over 75% of the bandwidth needs in a gaming load, and then just use the PCIe at ~100-120GB/s to cover the rest.

Perhaps this still isn't possible with PCIe 6.0 and DDR5, but on each iteration of PCIe and GPU architectures with larger LLC chunks I think we're getting closer to VRAM-less architectures.

At some size LLC will just become VRAM, and nothing will change. The idea of using system memory for graphics never panned out and it's unlikely that it ever will - PCIE is just too long to provide enough bandwidth.

 

[no-X]

The i740 did have dedicated memory.. was it able to allocate system memory?

i740 was designed when memory was extremely expensive. Intel's idea was to save expenses by using AGP texturing (so textures will stay in system memory) and equip it with a small amount of onboard memory for operating buffers. It wasn't a bad concept, but memory prices fell and the expected advantage was lost. In fact it was a disadvantage, because the GPU wasn't able to load textures from local memory, so adding more onboard memory didn't solve the problem. i740 became a low-end product, but other manufactures offered low-end products with PCI bus and that wasn't possible with i740 due to the dependence on AGP texturing. Real3D prepared PCI version of i740. It was based on an addition controller between the PCI and GPU and exquipped with a second pool of onboard memory, which was used solely for textures.