I think the PS5 is very unlikely to have RAID0 between its internal SSD and the M.2 expansion, but with the SeriesX it's just impossible IMO. From the pictures, part of the custom expansion cartridge stays outside the console, probably on purpose to make it hot-swappable. The last thing we'd want would be for the console's games to all be rendered useless the moment someone pulled out the cartridge.
Games in the first few years will most likely hit native or near native 4k, especially on first party titles. It is only around mid gen do we start to see substantial drop in res among various titles but that's when mid gen upgrades happen and start to do their thing. A PS5 Pro first party game would be insanely good looking at 4k native.
You quoted but seemed to miss an important part of what he said
Unsure if the consoles will be able to do ML upscaling fast enough to be useful, but non native resolution is already a staple and we won't be going back. So even without ML they will progress with temporal injection/reconstruction, checkerboarding etc.
Yep and although upping resolution is the simplest thing to do, I would prefer them not to in this case. .
I wonder if that would inadvertantly bias towards the dominant game genre of the day. 3D platformers at some point were dominant, then FPS, then linear photoreal games, now open worlds are all the rage, both as twitchy FPS and more slow paced TPS... and each genre have a very different bias towards resolution or frame rate, and between high poly count vs high texture details. Interior vs exterior.
If you believe what Cerny said, it's performing above what the TF number is indicating because of the modifications they made to RDNA2. Which are proprietary to Sony and not part of the AMD roadmap. Either you believe him or you don't. He said it's wrong to use the TF as a performance metric. It's just the sum of ALUs multiplied by the clock, and there's a lot of other things going on that can afffect cache hit ratio, occupancy, etc...
I have little reason not to believe him, but did he quantify how much difference it makes? 0.1% or better thermals, power draw?
No he didn't give numbers, it's not really possible at this stage. Honestly we have no clue what the real world impact is going to be for their alterations. He was singling out the cache scrubbers as a sony exclusive feature that AMD wouldn't use on PC ("developed just for us"). And he said that during heavy streaming it prevents continuously scrapping the entire gpu cache just because the storage engine DMAed something. I don't know how gpu cache works so I have no idea if it's a big deal or not. Until now I had no idea it needed to be scrapped because another module decides to write something in ram. I'm assuming flushing the gpu caches is a big inefficiency hit.
I guess he did 10.3 / 12.2 == 0.844, so it's 84% of XBSX, a 16% deficit, rounded to a nicer sounding 15%
How so? You have RT units capable of performing however many intersect tests per clock. 1 unit at 10 GHz should be able to process the same number as 10 units at 1 GHz, I'd have thought. How does parallelism help with AMD's implementation of RT in RDNA2?
