Baseless Next Generation Rumors with no Technical Merits [post E3 2019, pre GDC 2020] [XBSX, PS5]

[bgroovy]

The way they got to theoretical numbers for Arden and Oberon/Ariel is to take their bus width and use 14Gbps chips, which gave them - 448/560GBs of theoretical bandwidth. Using 14Gbpd chips will yield max theoretical bandwidth, but if they are to use higher clocked memory modules (say 16Gbps or even 18Gbps), then that number can go above theoretical (because its theoretical only for 14Gbps in the first place).

But there's no evidence that they have changed to faster memory.

 

[BRiT]

There's no evidence they haven't.

 

[Proelite]

But there's no evidence that they have changed to faster memory.

Same way that there is no evidence that PS5 is more than 10TF, within the context of the github leak.
There is direct evidence in the Github file that PS5 is 9.216TF.

I am not sure how one can use 530gb/s to point to 10+ TF PS5, when the same source shows 9.216TF PS5, and that's dismissed.

 

[AbsoluteBeginner]

But there's no evidence that they have changed to faster memory.

There is no evidence of change because there is no test for Arden. Its only theoretical template.

 

[bgroovy]

There's no evidence they haven't.

Yes there is: the render from E3.

 

[BRiT]

Yes there is: the render from E3.

And the evidence that things haven't changed since then?

 

[bgroovy]

And the evidence that things haven't changed since then?

What are you doing?

 

[AbsoluteBeginner]

Yes there is: the render from E3.

Funny, because render from E3 would point to lower BW then Github theoretical data!

 

[BRiT]

What are you doing?

Successfully poking the religious camps on both sides.

 

[BRiT]

Funny, because render from E3 would point to lower BW then Github theoretical data!

But ... somehow older data precludes newer data from being valid because it came before it.

 

[Esrever]

What they had to downgrade the sxs because it would be unfair to the PS5?

 

[AbsoluteBeginner]

But ... somehow older data precludes newer data from being valid because it came before it.

Seriously though, we dont know exactly what total BW will be from Github data. They show theoretical data on 256bit bus (Oberon) and 320bit bus (Arden) with 14Gbps chips. That makes it max theoretical for Oberon - 448GB/s and 560GB/s for Arden.

Any change done to memory modules to include faster chips will result in higher then theoretical number, as is a case in Oberon. Arden wasnt tested so we have no idea...

 

[Globalisateur]

I would advise you to look into documents themselves before pointing out inconsistencies.

The way they got to theoretical numbers for Arden and Oberon/Ariel is to take their bus width and use 14Gbps chips, which gave them - 448/560GBs of theoretical bandwidth. Using 14Gbpd chips will yield max theoretical bandwidth, but if they are to use higher clocked memory modules (say 16Gbps or even 18Gbps), then that number can go above theoretical (because its theoretical only for 14Gbps in the first place).

But you can't go faster than 448 GB/s with 14Gbps. That's impossible using GDDR6 (in that configuration) cause It's the max theoretical ever. Seems you and Proelite are doing the same mistake. It's simple maths.

I would advise you and @Proelite to train with basic maths. And theoretical bandwidth > tested bandwidth. Always.

EDIT: removed stupid stuff, very tired now, will try again after a good night sleep...

 

[mpg1]

What they had to downgrade the sxs because it would be unfair to the PS5?

There's actually a fanboy commission where you can lobby complaints about teraflop inequality. Phil Spencer and Mark Cerny have "teraflop dials" on their desk and if enough fanboys complain they are obligated to turn down the dial and the engineers will lower the clocks accordingly.

 

[AlNom]

Play nice.

 

[AbsoluteBeginner]

But you can't go faster than 448 GB/s with 14Gbps. That's impossible using GDDR6 (in that configuration) cause It's the max theoretical ever. Seems you and Proelite are doing the same mistake. It's simple maths.

14 (gbps) *32 (bit channel of GDD6) = 448 GB/s.

I would advise you and @Proelite to train with basic maths like above. And theoretical bandwidth > tested bandwidth. Always.

What happens when you use 16Gbps chip instead of 14Gbps one, which are used as default for theoretical value?

I suppose AMD will tell Sony or MS "Ammm...guys, you cannot do that. We put 448GB/s and 560GB/s as theoretical maximum soo...please remove 16Gbps chips and use 14Gbps ones, because we cannot have it higher then theoretical"

 

[BRiT]

Play nice.

Is that Nintendo's moto?

 

[Globalisateur]

What happens when you use 16Gbps chip instead of 14Gbps one, which are used as default for theoretical value?

Well the theoretical goes to 512. But I removed that equation as it's not the good one. 14*32 is right, not the indications (very tired).

 

[Proelite]

For the 4 posters who hates me and my apparently bias:

https://forum.beyond3d.com/posts/757766/

https://forum.beyond3d.com/posts/757768/

https://forum.beyond3d.com/posts/760091/

https://forum.beyond3d.com/posts/1662270/

https://forum.beyond3d.com/posts/1664512/

I am not going to sugarcoat Xsx if it's weaker or MS has a bad plan.

So far I don't have to sugarcoat anything, except maybe for Lockhart price / power in the future.

 

[AbsoluteBeginner]

Well the theoretical goes to 512. But I removed that equation as it's not the good one. 14*32 is right, not the indications (very tired).

So, all you really have to do to get over theoretical value that used 14Gbps chips as default is to...use higher clocked ones? I mean, thats exactly the point. Theoretical value for Oberon in Github data is 448GB/s because they gave theoretical value of BW based on bus and ASSUMED memory speeds. Any change to higher memory speed, which is relatively banal thing to do, will result in higher bandwidth then theoretical.