Especially in our research organization, we constantly develop and evaluate technologies for building systems different ways. [At HotChips, a team] demonstrated a technology for assembling a
system-in-package by assembling
chiplets on an organic substrate using a technology called ground reference signaling (GRS), which we originally developed about 5 or 6 years ago. [It] has two really nice properties. One is it’s very low energy per bit—about a picojoule per bit. Compare that to a typical
SerDes, which may be around 6 or 7 picojoules per bit. And GRS is single-ended, so it’s very dense. It’s 25 gigabits per second, but that’s like a 50-gigabit SerDes because a 50G SerDes takes two tracks out from under the edge of the chip. And that’s expensive resources—tracks out from the edge of the chip. Fins are cheap. But getting route-outs is what tends to limit you. So it has very high edge density. And then we’ve already demonstrated with our Volta modules and Pascal modules with
HBM that we can assemble multiple chips on a silicon
interposer, which is a technology that’s both denser and you can get more connections. We get about a terabyte per second per millimeter with GRS. You can get around 4 terabytes per second per millimeter on a silicon interposer. And so it’s no denser in terms of bandwidth per unit length. And it’s much lower energy. You can get energies down to about a 10th of a picojoule per bit connecting things in a silicon interposer. This gives us a bunch of technologies on the shelf that at some point in time, if it became economically the right thing to do to assemble GPUs from multiple chiplets, we basically have de-risked the technology. Now it’s a tool in the toolbox for a
GPU designer.
