Baseless Next Generation Rumors with no Technical Merits [post E3 2019, pre GDC 2020] [XBSX, PS5]

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  • 20CU chiplets shared between the PSVita2/XBortable and PS4/XB1.
A 20 CU Navi would probably make for a pretty groovy (and hefty) portable. There are 10CU Vega laptops out there, so a switch from a 10CU Vega on 16nm to a 20CU Navi on 7nm would give us comparable power consumption if we assume the same clockspeed of 1.3GHz.

That would make for a 3.3TF portable

Why would you need a 3.3TF portable? It's not powerful enough to run PS4 Pro games and it would be a complete overkill for PS4 games. Sony has already said they won't be fragmenting their game development into multiple platforms so making an independent mobile console is probably out of the question too.
The 10CU embedded Vega in Raven Ridge / Picasso is also extremely bandwidth bound, to the point that even in the desktop with DDR4 3000MT/s memory the 8CU Vega gets about the same performance. Getting that much throughput would need very fast memory that would also consume too much power.
The closest 3.3TF AMD GPU we have right now is the apple-exclusive 14nm Vega Pro 20 with 20CUs at 1.2GHz and it consumes around 30-35W. Going 7nm wouldn't miraculously make it consume 5W.


I still think Sony could pull off a mobile PS4, though. With 7nm they could probably build a small SoC with 2x 4-core Zen2 CCX at 1.6GHz with only 2*2MB L3, half size FPU per core and disabled hyperthreading, plus an embedded Vega/Polaris with e.g. 12 CUs at 1.2GHz for an identical 1.8 TFLOPs and a single low-clocked and undervolted 8GB HBM2 stack. The SoC itself should be really small (little more than ~35mm^2 for CPU because of reduced L3, ~80mm^2 GPU, ~30mm^2 I/O and IF) and the thermals might even allow for stacking a 120mm^2 HBM2 directly on top of the SoC.
This wouldn't be cheap, though.
 
If they used the same chip for super slim PS4, I wonder if the difference in price would be that great across the total BOM (chassis, PSU, heatsink, transportation).

Basically I really, really want a portable PS4. Make it happen Sony. Please. Pretty please even.
 
I am coming back to that PCB Reddit leak again...

Its kinda funny how die size there (316mm2) matches Navi 40CU + ~10% for additional RT space on CUs/ZEN2/256 bit bus to mm.

Its interesting because some people are saying "Well of course it matches, he just added all Navi XT parts + Zen2 with 256 bit bus and got it", but he leaked it on 20th of May, before Navi was shown (Computex) or exact die size was revealed. And its not like it was GCN 2.0 so he could have guessed, CUs are completely revamped. It is either pretty crazy coincidence, or PS5 is actually 316mm2 Navi 10 with RT hardware and 8 core Zen2 on 256 bit bus.
 
I am coming back to that PCB Reddit leak again...

Its kinda funny how die size there (316mm2) matches Navi 40CU + ~10% for additional RT space on CUs/ZEN2/256 bit bus to mm.

Its interesting because some people are saying "Well of course it matches, he just added all Navi XT parts + Zen2 with 256 bit bus and got it", but he leaked it on 20th of May, before Navi was shown (Computex) or exact die size was revealed. And its not like it was GCN 2.0 so he could have guessed, CUs are completely revamped. It is either pretty crazy coincidence, or PS5 is actually 316mm2 Navi 10 with RT hardware and 8 core Zen2 on 256 bit bus.
10% seems a lot to me. Without tensor cores, how much space Nvidia allocate to RT on their cards ?

And your maths don't work here.
 
10% seems a lot to me. Without tensor cores, how much space Nvidia allocate to RT on their cards ?

And your maths don't work here.
I think its 8% additional on CUs, so that was taken as "baseline". Could be smaller, could be a bit bigger, doubt it would be much either way.

10WGP (20CUs) = ~45.3mm2, so for 40CUs we are talking about ~90mm2 of die space. 8% was added to it as baseline, Nvidia numbers, and therefore 40CUs with RT hardware was estimated at ~98mm2.

So...

40CUs + 8% additional space for RT = ~98mm2
Frontend x 2 (one for 20CUs) = ~46mm2
256 bit bus (4 x 64bit) = ~65
I/O = ~37.5mm2
Zen2 = ~70mm2
Entire die - 316.5
 
I think its 8% additional on CUs, so that was taken as "baseline". Could be smaller, could be a bit bigger, doubt it would be much either way.

10WGP (20CUs) = ~45.3mm2, so for 40CUs we are talking about ~90mm2 of die space. 8% was added to it as baseline, Nvidia numbers, and therefore 40CUs with RT hardware was estimated at ~98mm2.

So...

40CUs + 8% additional space for RT = ~98mm2
Frontend x 2 (one for 20CUs) = ~46mm2
256 bit bus (4 x 64bit) = ~65
I/O = ~37.5mm2
Zen2 = ~70mm2
Entire die - 316.5
You forgot the command processor and ACEs.
 
I think you have to clarify it further to him.
54 divided by 2 is 27.
27 is 3ˆ3
Where the base is 3

Since this is the baseless rumors thread, that isn’t possible, the number of CUs has to be a prime number.


This doesn't make any sense. Worded wrong?
 
I’d rename this The Schrodinger Next Gen Tech Thread.

There might be RT in the next consoles or not.

There might be 80 CUs per GPU or not.

There might be 3 GPUs in each console. Or not.

Trump might ban consoles by Xmas. Or by next Xmas.

All these realities are true right now. Only one will become the reality we live in.

Yours truly,
LB
 
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