Bondrewd
Veteran
Between this, and no FY guidance, what's happening with nV anyway?
AMD: Navi Speculation, Rumours and Discussion [2019-2020]
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Where have you seen the 200W number?
What was that "SUPER" marketing about as well? Did not see anything referenced on news about the press conference.
Bondrewd
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Love_In_Rio
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Well, if there are two companies that can get at least the nominal improvements from node changes, and usually more, are Apple and Nvidia. Is quite logical the imaginary product that Nvidia launches at 7nm 175 watts will be way faster than a 2080, surely nearer to a 2080ti per the last node changes. This plus RX cores...They got efficiency gains from the 14 to 12 nm transition!
D
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200W is just Vega 64's 300W with 50% efficiency uplift, so 300/1.5 = 200W.
RX 5700 should have a performance close to Vega 64's since AMD themselves compared it to a RTX 2070.
Looking at the framerates they got during the presentation (80 to 120 fps), I'm guessing they benchmarked Strange Brigade at 2560*1440 Ultra:
So its performance is similar to a Vega 64, perhaps closer to a Liquid Edition.
Is nvidia going to release 7nm GPUs at all?
Last rumor I heard said they were going to skip 7nm and go with Samsung's 7nm EUV in the middle of 2020.
And then by mid 2020 we might not even be looking at Navi from AMD's side. Which is why we don't usually compare real GPUs with what-if imaginary ones.
200W is just Vega 64's 300W with 50% efficiency uplift, so 300/1.5 = 200W.
RX 5700 should have a performance close to Vega 64's since AMD themselves compared it to a RTX 2070.
Looking at the framerates they got during the presentation (80 to 120 fps), I'm guessing they benchmarked Strange Brigade at 2560*1440 Ultra:
So its performance is similar to a Vega 64, perhaps closer to a Liquid Edition.
Is nvidia going to release 7nm GPUs at all?
Last rumor I heard said they were going to skip 7nm and go with Samsung's 7nm EUV in the middle of 2020.
And then by mid 2020 we might not even be looking at Navi from AMD's side. Which is why we don't usually compare real GPUs with what-if imaginary ones.
Thanks, it makes I sense.
However, I don't think we can conclude that Navi is either 40% or 12.5% behind nVIDIA in efficiency, just that it indeed is behind, as GTX2070 is 12nm and Navi 7nm. We have no idea how much of that increase in efficiency comes from process or architecture. Granted that AMD says it has 25% better IPC, but AFAIK that is only applicable to CUs, not the front end? I guess we'll see soon anyway.
If you look at evolution, then you call it a different species rather near the branch, and not after it doesn't look like it's sibling anymore.
I see no problem with naming the new branch RDNA. It's going to evolve into something rather different I pressume. If you are forced to drop RT-hardware into it, why would you waste the RT-silicon on a wide vector-processor (massive coherent parallel compute line). Afterwards you play with non-coherent memory-access and maybe smaller vector-widths, and you're fully in RDNA and rather different than GCN which get's divergent optimizations too.
If you embrace the force fully, you go full lego, resulting in an entire clade of possible configurations.
edit: Ok, now I got the moniker RDNA.
I see no problem with naming the new branch RDNA. It's going to evolve into something rather different I pressume. If you are forced to drop RT-hardware into it, why would you waste the RT-silicon on a wide vector-processor (massive coherent parallel compute line). Afterwards you play with non-coherent memory-access and maybe smaller vector-widths, and you're fully in RDNA and rather different than GCN which get's divergent optimizations too.
If you embrace the force fully, you go full lego, resulting in an entire clade of possible configurations.
edit: Ok, now I got the moniker RDNA.
Dr Su stressed that Navi is a purposeful designed gaming GPU and they started with a clean slate, like they did with Ryzen.
"AMD loves Gamers..."
DR Su is a Gamer herself and has been repeating that same mantra for over a year now, specially at gaming events. She just mentioned that Navi is purposely engineered for gaming and Navi will be used in consoles/etc, & that RadeonDNA architecture was designed to scale.
Navi = RDNA = Gaming
If @ 275mm2 Navi has RTX2070 prowess, then what does a 325mm2 Navi chip have in store for us..? (And what is the size of the TU104 again??)
"AMD loves Gamers..."
DR Su is a Gamer herself and has been repeating that same mantra for over a year now, specially at gaming events. She just mentioned that Navi is purposely engineered for gaming and Navi will be used in consoles/etc, & that RadeonDNA architecture was designed to scale.
Navi = RDNA = Gaming
If @ 275mm2 Navi has RTX2070 prowess, then what does a 325mm2 Navi chip have in store for us..? (And what is the size of the TU104 again??)
gamervivek
Regular
On reddit, a user superimposed the pic on the leaked PCB and they're getting a 252mm2 die size.
If AMD have doubled the frontend, a bigger navi shouldn't be much bigger than 400mm2 with doubled shader count. Or maybe it triples it at the limit for current GCN chips?
Did AMD mention settings for Strange Brigade benchmarks because nvidia released a driver in April that improved Turing performance on Vulkan
https://www.nvidia.com/en-us/geforce/news/mortal-kombat-11-game-ready-driver/
If AMD have doubled the frontend, a bigger navi shouldn't be much bigger than 400mm2 with doubled shader count. Or maybe it triples it at the limit for current GCN chips?
Did AMD mention settings for Strange Brigade benchmarks because nvidia released a driver in April that improved Turing performance on Vulkan
https://www.nvidia.com/en-us/geforce/news/mortal-kombat-11-game-ready-driver/
Bondrewd
Veteran
No.
The thing is also an odd choice to demo the uArch that's not about throwing SPs at the problem for once.
For GPUs in this size range the salvage bin would usually lose one CU per engine and going by things like the R480/470 and Vega64/60 the percentage isn't as problematic.
As for whether balanced disabling is strictly necessary, I am not sure. It seems like it's virtually done this way, even though I'm sure there are many GPUs with 4 CUs disabled that had fewer than 4 defective.
I could see arguments for streamlining the number of salvage SKUs and differentiating the products more clearly, and for load-balancing reasons where having one SE significantly unbalanced with the others might cause complications.
The choice is in how those threads understand which part of the workload applies to them. If there are multiple back-end threads, are those threads or sibling threads on the same core going to perform the front-end work, or is there going to be a subset of threads/cores devoted to front end work that will produce coverage and culling work that the other threads will consume. Defining the number of producers and consumers, and then figuring out how the results are communicated strikes me as being a more fundamental consideration than the specifics of an API.
If there's a crossbar between front ends, any shader engine could produce output relevant to any other engine and be the consumer of output from any other. The lack of guarantee about where any given primitive may be and the way that screen-space is tiled give the problem those parameters.
Losing the front-end crossbar places the onus on a heavier and invariant front-end load on all shader engines, and the reliance on the memory subsystem and its crossbar. The memory crossbar has its own burdens with regards to clients and their needs, and its considerations for connectivity and capacity are made heavier. At least in that ASCII rumor table, I'm wary of the individual shader engines not having the traditional amount of grunt to get through the more predictable but heavier base demand.
The API was mostly agnostic to the details of how its instructions were carried out. The biggest hardware difference was the disparate precision requirements between pixel and vertex shaders, which in modern times has returned with the advent of FP16 pixel processing that the APIs did not drive.
The GDDR6 subsystem would have a greater area and power impact, which may obscure some of the benefits. Depending on how AMD handles the memory channels and infinity fabric, there could be an area and power cost commensurate to the bandwidth and number of fabric stops.
A 256-bit GDDR6 system has 8 chips, albeit with 2 16-bit channels each. A controller block could handle multiple channels, but the physical locality would be worse for the same amount of bandwidth compared to Vega. Vega 10 has its fabric and controllers on one side, while a GDDR6 system likely has blocks around 3 or 4 sides, and if they have Vega's way of connecting clients with a strip of infinity fabric, the area penalty might be closer to how Vega 20 has a significant amount of area around the GPU belonging to uncore elements like the fabric.
That puts Navi into a more realistic context. It's a necessary upwards step that I think will require that AMD keep closer to its promised cadence with Next-gen in order to provide a sufficiently compelling product pipeline going forward.
Given how many fans seem to imagine a level of familiarity with AMD's CEO, you'd think there's even money on at least one of them already having 3D-printed replicas of it--for chip photo comparison reasons they'd say.For all the times she's gone on stage, you'd think we'd just have the physical measurements for Lisa's hand for easier size analyses.
If I recall correctly, AMD didn't disclose Bonaire was a next-gen Sea Islands GPU until after the consoles were announced.
Going from the differences:
"// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
- EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX909,
+ EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1010,"
GFX6 was the first GCN architecture, and whatever the most recent GCN chip is gets put in the _LAST line.
It seems like the compiler developers do not consider it separate from its predecessors. At least from the standpoint of instruction generation, it has new features but still does the same general things.
I like this analogy because that's the way that we do things in the real world. AMD says they rebuilt the whole thing from the ground up, that's fine, they absolutely can and it can still end up looking very similar to GCN. Perhaps they've discarded or changed things they didn't like, made some foundational changes to some items for the future, but it may still end up looking like GCN.
There's nothing wrong with this concept, a lot of our tools can be rebuilt ground up, but a hammer is a hammer, you can revisit the hammer and make things stronger here, lighter there, but at the end of the day, it's largely going to look the same. I don't believe in this concept that an all new ground up architecture would have to look wildly different. That doesn't make a lot of sense to me, if you've got something great and it's working really well in some areas, why toss those ideas aside. The graphics pipelines are moving towards general compute now and away from fixed-function, so how many different ways can we realistically slice and dice a GPU when we consider there are still specific objectives they want to hit.
Jawed
Legend
There clearly will be an impact if this is true. Spending extra transistors on, amongst other things, adding CUs to compensate for the lack of global functionality seems entirely rational to me. Worst-case performance should be improved by softening (if not removing) global bottlenecks.
NVidia made this investment a long time ago. It's about time AMD caught up.
Frenetic Pony
Veteran
If it's just 1.5x per watt then a theoretical 80cu/512 bit bus big navi would have to be downclocked.
If we go by 25% "IPC" increase on the Strange Brigade benchmark then we'd need a clockspeed of around or over 2ghz to hit say,110fps at a 40cu card, and a 32cu card doesn't make sense for performance or die size. Which is pretty high for a finfet GPU, but then AMD maxing out clockspeeds regardless of (desktop) TDP has been their own stated strategy so that's hardly surprising.
It wasn't nvidia being great company and praising an amazing product coming from competition in form of Navi?
so it means NAVI is still GCN (despite RDNA moniker) and next gen is the real next gen slated for 2020 as AMD Earning Calls roadmap shows. Thanks
didn´t they said the same about Polaris and then Vega ? I recall some Bridgman talk about how they rebuild every block in Polaris to get different lego....
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Think so too, about the odd choice. If Navi is completely revamped and focussed on gaming, I would not use a benchmark where Vega already shines, but something where my previous µarch is doing not-so-great in order to fully highlight the improvements that have been made. Makes me wonder.
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