Intel Kaby Lake + AMD Radeon product *spin-off*

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Quad Engine is directly confirmed
 
So they're going against 4-core Kaby Lake U + GTX 1050 on the 65W version and 4-core Kaby Lake H + GTX1060 Max-Q on the 100W version.

I guess it makes sense, since the 8550U is 15W and the GTX1050 is 53W, and then the KBL-H is 45W and the GTX1060 Max-Q is 60-70W.

But at such a low number of CUs (1536 shader processors), this GPU needs to be clocked rather high to compete with the GTX1060 Max-Q that sustains 1280 CUDA cores at 1450MHz.

Could we be looking at a chip clocking over 1600MHz in the 100W part? If so, I doubt it's made at GlobalFoundries.. perhaps TSMC 16FF+?


it's just connected to the radeon via pcie x8, so using the Radeon memory as a cache is not really interesting I don't think,
I wonder if 8x PCIe 3.0 won't become a bottleneck for HBCC working properly. With only 4GB to work with, this GPU will definitely have to use HBCC in some modern games.




This design appears to have 64 ROPS for 24 CU's. Full fat back end of Vega 64 given to Vega 24.
It has 16 Render Back Ends. Isn't that 16 ROPs and not 64?
EDIT: Yup, per AMD's own nomenclature, Vega 64 has 64 render back ends.
Quad geometry engines has been pretty much standard for a long time for mid to high-end GPUs from AMD.
Though this might be a new ROP that pumps out 4 pixels/clock each?
EDIT 2: Vega's ROPs have always had a 4 pixel/clock output, so it's really just 16 quad-pumped ROPs.
 
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So they're going against 4-core Kaby Lake U + GTX 1050 on the 65W version and 4-core Kaby Lake H + GTX1060 Max-Q on the 100W version.

I guess it makes sense, since the 8550U is 15W and the GTX1050 is 53W, and then the KBL-H is 45W and the GTX1060 Max-Q is 60-70W.

But at such a low number of CUs (1536 shader processors), this GPU needs to be clocked rather high to compete with the GTX1060 Max-Q that sustains 1280 CUDA cores at 1450MHz.

Could we be looking at a chip clocking over 1600MHz in the 100W part? If so, I doubt it's made at GlobalFoundries.. perhaps TSMC 16FF+?



I wonder if 8x PCIe 3.0 won't become a bottleneck for HBCC working properly. With only 4GB to work with, this GPU will definitely have to use HBCC in some modern games.





It has 16 Render Back Ends. Isn't that 16 ROPs and not 64?
EDIT: Yup, per AMD's own nomenclature, Vega 64 has 64 render back ends.
Quad geometry engines has been pretty much standard for a long time for mid to high-end GPUs from AMD.
Though this might be a new ROP that pumps out 4 pixels/clock each?
EDIT 2: Vega's ROPs have always had a 4 pixel/clock output, so it's really just 16 quad-pumped ROPs.
It's just AMD being confusing with naming. 16 render back ends is 64 ROPs.
 
This design appears to have 64 ROPS for 24 CU's. Full fat back end of Vega 64 given to Vega 24.

Will be very interesting to see die size and efficiency.

Up to 16 RBEs (64 ROPs). Meaning the possibility is there for a product with that many, but it's not confirmed that the first product will have that many.

Regards,
SB
 
Up to 16 RBEs (64 ROPs). Meaning the possibility is there for a product with that many, but it's not confirmed that the first product will have that many.

Regards,
SB

I'm assuming the first product they release will be the top end SKU with 64 ROPs, rumored to be a 20 CU version with an I5 so I imagine that's where they cut the ROPs
 
Going back to those clocks.

With Polaris and Vega, AMD has traditionally needed around 25% higher TFLOPs throughput to achieve competitive performance in games. Eg:
GTX 1060 FE: averages ~1840MHz = 4.7 TFLOPs
RX 480 : averages 1250MHz - 5.76 TFLOPs
Difference = 22%

Now with this GTX 1060 Max-Q we know it averages at around 1450MHz, which is 3.7 TFLOPs.

3.7 x 1,25 = 4.63 TFLOPs.



For Vega M's 24 CUs to reach 4.63 TFLOPs, it needs around 1500MHz average.


But the Vega 56 needs around 200W in "balanced mode" to average around 1420MHz.
Here, the Vega M (which we can assume is about half as big) has a TDP of 70W at most, yet it's getting significantly higher clocks.


And if we go for the power numbers at 1500MHz for Vega 10 chips, it gets really crazy.
Either Vega 56 or Vega 64 need close to 300W to maintain that clock.

At these clocks, Vega 64 needs 25W-per-TFLOP. (300W / 12 TFLOPs)
Vega M would need close to 15W-per-TFLOP. (70W / 4.63 TFLOPs)


So, in conclusion, either:

1 - Vega M is clocked at lower than 1.4 GHz but has a bunch of features that are working that makes it get a much higher performance-per-CU-per-clock than Vega 10
or
2 - Vega M is clocked at 1.5GHz or more which means its power-clock curves are immensely better than Vega 10's.



It's just AMD being confusing with naming. 16 render back ends is 64 ROPs.
Nope. According to AMD's own naming, "Render Back End" = ROP.

jKMuF86.png


Vega 64 has 64 Render Back Ends = 64 ROPs.
Vega M has up to 16 Render Back Ends = 16 ROPs.


Sorry, but:
Aw damn I shouldn't have read that..
 
3.7 FLOPs for the 100W version.
That's 1.2GHz peak clocks for the GPU.

No way that realistically competes with a 1450MHz GTX 1060.
Something's missing here.

Either those values are wrong or the videocardz comparison results are completely cooked.

Unless there's some super Vega magic happening in that chip.
 
Up to 16 RBEs (64 ROPs). Meaning the possibility is there for a product with that many, but it's not confirmed that the first product will have that many.

Regards,
SB
Hmm? First is supposed to be i7-8809G with the Vega M GH -version (at least that's how I understood it)
 
Nope. According to AMD's own naming, "Render Back End" = ROP.
Vega 64 has 64 Render Back Ends = 64 ROPs.
Vega M has up to 16 Render Back Ends = 16 ROPs.

At least for everything up to this point 4 ROPs were part of an RBE, and the drivers for the Vega's binning have outlined a maximum count of 4 RBEs per shader engine.
I think it's possible the error is in that slide.
 
Going back to those clocks.

With Polaris and Vega, AMD has traditionally needed around 25% higher TFLOPs throughput to achieve competitive performance in games. Eg:
GTX 1060 FE: averages ~1840MHz = 4.7 TFLOPs
RX 480 : averages 1250MHz - 5.76 TFLOPs
Difference = 22%

Now with this GTX 1060 Max-Q we know it averages at around 1450MHz, which is 3.7 TFLOPs.

3.7 x 1,25 = 4.63 TFLOPs.



For Vega M's 24 CUs to reach 4.63 TFLOPs, it needs around 1500MHz average.


But the Vega 56 needs around 200W in "balanced mode" to average around 1420MHz.
Here, the Vega M (which we can assume is about half as big) has a TDP of 70W at most, yet it's getting significantly higher clocks.


And if we go for the power numbers at 1500MHz for Vega 10 chips, it gets really crazy.
Either Vega 56 or Vega 64 need close to 300W to maintain that clock.

At these clocks, Vega 64 needs 25W-per-TFLOP. (300W / 12 TFLOPs)
Vega M would need close to 15W-per-TFLOP. (70W / 4.63 TFLOPs)


So, in conclusion, either:

1 - Vega M is clocked at lower than 1.4 GHz but has a bunch of features that are working that makes it get a much higher performance-per-CU-per-clock than Vega 10
or
2 - Vega M is clocked at 1.5GHz or more which means its power-clock curves are immensely better than Vega 10's.




Nope. According to AMD's own naming, "Render Back End" = ROP.

jKMuF86.png


Vega 64 has 64 Render Back Ends = 64 ROPs.
Vega M has up to 16 Render Back Ends = 16 ROPs.



Aw damn I shouldn't have read that..
Notice how the 16 RBE's are listed as being capable of 64 Pixels per clock. This is the same as Vega 64.

The error is in that slide, Vega has 16 RBE's AKA 64 ROPS.
 
3.7 FLOPs for the 100W version.
That's 1.2GHz peak clocks for the GPU.

No way that realistically competes with a 1450MHz GTX 1060.
Something's missing here.

Either those values are wrong or the videocardz comparison results are completely cooked.

Unless there's some super Vega magic happening in that chip.

The Videocardz page says this:

-Intel Dynamic Tuning — NEW! Dynamic power sharing enables enthusiast performance in sleek systems
-Up front design benefit of 17.5W
-Same performance with up to 18% higher efficiency

What if its due to them?
 
Gee I don't know about that, some of my computer geek friends say nvidia is better...
 
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