AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

It's apparently so broken it can't be fixed.

It makes me wonder if Vega would be better off without hierarchical-Z support. Basically, DSBR and hierarchical-Z are competing to do the same thing (prevent shading of fragments that will have no effect on the render target). Why have two things on chip that are trying to do the same thing?

Without hierarchical-Z, perhaps there'd be less paths competing for resources. Hierarchical-Z needs to support two kinds of queries:
  1. coarse-grained - can any of this triangle be visible in each of the coarse tiles of the render target?
  2. fine-grained - which fragment-quads (or MSAA fragment-quads) of this triangle can be visible
I wonder if it's simpler to just commit to doing DSBR and building the whole GPU around making that fast.

Perhaps Navi won't have hierarchical-Z and Vega is the hardware that allows AMD to do experiments with DSBR.
 
It'd be great if AMD could simple fix the broken hotspot point, even people with watercooling can get deltas of 30C and even 40C in some cases. If the sensor is on die then it's amazing how broken the cooling/manufacturing/whatever is.

And someday they can fix the driver so that I can play the carmageddon reboot.
 
But is something really broken? What if everything is working as intended or what if part of the design just turned out to yield bad results causing need to revisit chip architecture?
 
If everything is working as intended, it was a weird goal... You can even make the case than in some case the ipc is better on Polaris, for gaming... Or, the "one chip for all market" was the goal, and I guess they've done it, but I don't know if the backlash from the gaming community was worth it. But I guess they don't have the ressources to make a gaming chip, a "pro" chip, etc...
 
And still we find Vega10 in pro / science stuff too, now. I'll be very curious if the "Vega story" leak in e few months / year, and tell us what happened....
 
Jawed said:
Basically, DSBR and hierarchical-Z are competing to do the same thing (prevent shading of fragments that will have no effect on the render target). Why have two things on chip that are trying to do the same thing?
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In what way are they trying to do the same thing? DSBR is about saving framebuffer memory bandwidth, Hi-Z has to do with occlusion culling. In fact the two might be working together... for each tile a triangle intersects a hi-z lookup could possibly prevent binning a triangle to a tile. Assuming the Hi-Z and DSBR tiles line up that is. More efficient cache usage that way.

edit - my mistake the Vega whitepaper mentions deferred work as well, but that still doesn't take away from my point about working together.
 
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It is possible to implement design perfectly while the design itself is bad and doesn't fulfill expectation. It could be something wasn't thought of while coming up with the design or it was known to be bad but went through anyway due to political reasons.

I really wonder if Vega works as designed or if implementation of design is broken. It might also be effort on software was underestimated and hence the fine wine effect when software eventually is finished.
 
manux said:
It is possible to implement design perfectly while the design itself is bad and doesn't fulfill expectation.
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Than you scrap it/don't talk about it. They very much did talk about Vega.
manux said:
I really wonder if Vega works as designed or if implementation of design is broken.
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It doesn't, that was confirmed ages ago.
manux said:
It might also be effort on software was underestimated
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That's to say it lightly.
I've never seen a company to launch unfinished product in the recent years.
It's not bad, it's not good, it's unfinished.
 
manux said:
It is possible to implement design perfectly while the design itself is bad and doesn't fulfill expectation. It could be something wasn't thought of while coming up with the design or it was known to be bad but went through anyway due to political reasons.
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That's the Bulldozer story. Vega may be the Bulldozer of GPUs.
 
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