Thread is motivated by this article about Haswell's decoupled l3 cache.
Since an always powered console don't have to worry about CPU frequency dropping below GPU frequency, I don't think a ring bus will be necessary.
For BC modes, the GPU will have exclusive access to 32mb of esram. In non-BC modes, the CPU and GPU can share the esram in all possible configurations.
Thoughts?
Since an always powered console don't have to worry about CPU frequency dropping below GPU frequency, I don't think a ring bus will be necessary.
For BC modes, the GPU will have exclusive access to 32mb of esram. In non-BC modes, the CPU and GPU can share the esram in all possible configurations.
Thoughts?