AMD: Speculation, Rumors, and Discussion (Archive)

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May I suggest that the power draw alarmists are shunted off to their own thread?
Every user is free to start their own thread on a new topic. The last time there was more than one thread in the PC realm some vocal users were confused and complained numerous times, so for now it's in the hands of the users to self-moderate.
 
I was hoping they would lower the voltage at high temperatures at least a tiny bit. Was there any card that would not be able to do that?
 
Spec compliance wise it is exactly the same as before the "fix". I mean why bother releasing a "fix" if it doesn't actually change the situation....

If the intend is to minimize a risk of catastrophic damage, the "compliance" doesn't really matter: it's all about the probabilities. Let's say that AMD estimated a hypothetical 1% of the card causing PCI-e slot overdraw issues, anywhere from instability under load to damaged mobos to burnt down systems/homes/small towns. With sales projections in the millions, that's a huge liability they would potentially have to shoulder. Now let's say the fix, while still technically "out of spec", reduces the overall issue incidence rate to 0.001% and that of truly catastrophic failure to 0.000001%. Even if they still have to issue hundreds of refunds, it's much less expensive.

So why not push the PCI-e slot draw even further down, to at most 60W equipment to be firmly in spec on at least one side? Presuming its even possible, drawing over 100W via 6-pin can now expose them to PSU issues, especially on low-grade units system builders tend to like.

In the end, barring some sort of hardware restriction that prevented further diversion of power from the slot, I am confident that fixed settings were chosen for minimum combined incidence rate projections for both slot and 6-pin, with "compliance" checkbox given secondary consideration, if any.
 
Every user is free to start their own thread on a new topic. The last time there was more than one thread in the PC realm some vocal users were confused and complained numerous times, so for now it's in the hands of the users to self-moderate.
OK. I'll try.

The power draw aspects have nothing to do with the Polaris architecture, nor even with it's embodiment in the current revision of the P10 chip. The discussion concerns a specific PCB design, and we have covered it in excruciating detail already. Everyone who understands anything about industrial design and statistical distributions have grasped the (lack of) practical significance of the discussions.
Can we please get back to discussing something at least related to 3D graphics?
 
OK. I'll try.

The power draw aspects have nothing to do with the Polaris architecture, nor even with it's embodiment in the current revision of the P10 chip. The discussion concerns a specific PCB design, and we have covered it in excruciating detail already. Everyone who understands anything about industrial design and statistical distributions have grasped the (lack of) practical significance of the discussions.
Can we please get back to discussing something at least related to 3D graphics?

Power draw out of spec when you draw fancy lines on the screen at the same time seems to be contained within the 3D graphics for anyone who knows anything about such subjects.
why is amd lying then about power draw out of spec?
why are people here trying to cover it up?
why is dave bauman silent about this?

Its a huge mess up and this will be drawn to anything that blows up a motherboard for decades to come.
I find such interesting as it contain 3D graphics.
 
Power draw out of spec when you draw fancy lines on the screen at the same time seems to be contained within the 3D graphics for anyone who knows anything about such subjects.
why is amd lying then about power draw out of spec?
why are people here trying to cover it up?
why is dave bauman silent about this?

Its a huge mess up and this will be drawn to anything that blows up a motherboard for decades to come.
I find such interesting as it contain 3D graphics.
If so, can you please consider discussing it in the industry section of the forum, rather than in the fused Vega/Polaris thread?
 
In the end, barring some sort of hardware restriction that prevented further diversion of power from the slot, I am confident that fixed settings were chosen for minimum combined incidence rate projections for both slot and 6-pin, with "compliance" checkbox given secondary consideration, if any.
What may be of more interest is what happens when overclocking (increasing power target). Does the power split remain a fixed fraction (both slot and 6-pin power usage goes up), or does the slot remain fixed and power use goes up only through the 6-pin?
 
But for only for AMD products ... could the power issue be an "architectural defect" at 14nm with regard to attaining a certain level of performance?

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But for only for AMD products ... could the power issue be an "architectural defect" at 14nm with regard to attaining a certain level of performance?
I don't see what you mean really. The power draw from the motherboard and the molex is PCB design, unrelated to the manufacturing process of the GPU.
The amount of power necessary to achieve a particular benchmark score depends on lithographic process, architecture and design targets. The last is important. If AMD had produced a P10 with, say, 44CUs (+TMUs, ROPs) running at 1.05V and using GDDR5X at a leisurely 10Gbps, they could have hit the same performance at a much lower power draw, but higher cost. The existing RX 480 can reduce power draw significantly while loosing relatively little performance, giving the impression that for whatever reason, the product was pushed a bit outside where it is happiest. Which incidentally suggests that it will do well when you back off a bit in mobile or more thermally constrained environments such as iMacs.

It's a game of skill and compromise. We cannot know how competitive Global Foundries 14nm process is compared to TSMC for these types of products. Nor about design tool glitches, process variance, defect rate...the list goes on and on. I think it is a given that both nVidia and AMD do the best they possibly can to come up with viable products. Overall, IMHO, they are relatively close in what they deliver regarded as a whole. Differences in where they compromise, and where they decide to introduce new capabilities is the air this forum breathes for its discussions.
 
It's a game of skill and compromise. We cannot know how competitive Global Foundries 14nm process is compared to TSMC for these types of products. Nor about design tool glitches, process variance, defect rate...the list goes on and on. I think it is a given that both nVidia and AMD do the best they possibly can to come up with viable products. Overall, IMHO, they are relatively close in what they deliver regarded as a whole. Differences in where they compromise, and where they decide to introduce new capabilities is the air this forum breathes for its discussions.
Also, I've been wondering. Yes, the die size is larger for AMD. But maybe achieving a smaller die costs exponentially more design/engineering resources – so for AMD, with their smaller volumes, it may actually be a cheaper total cost to not bother optimizing for die size too much?
 
Power draw out of spec when you draw fancy lines on the screen at the same time seems to be contained within the 3D graphics for anyone who knows anything about such subjects.
why is amd lying then about power draw out of spec?
why are people here trying to cover it up?
why is dave bauman silent about this?

Its a huge mess up and this will be drawn to anything that blows up a motherboard for decades to come.
I find such interesting as it contain 3D graphics.
I think this is the second time you've insinuated a conspiracy because Dave hasn't commented. Dave doesn't speak for AMD in all matters and most posts represent his own opinion. This site is unique due to the large number of members that work in related fields and calling members out for not participating in every discussion isn't what this site should be about.

Also, there is no cover up as AMD acknowledged the issue. The discussion is about why the issue occurred at all and how important the issue is. Some think it's a bigger deal than others.
 
Power draw out of spec when you draw fancy lines on the screen at the same time seems to be contained within the 3D graphics for anyone who knows anything about such subjects.
why is amd lying then about power draw out of spec?
why are people here trying to cover it up?
why is dave bauman silent about this?

Its a huge mess up and this will be drawn to anything that blows up a motherboard for decades to come.
I find such interesting as it contain 3D graphics.


Although you made some good points, there is nothing AMD is hiding, there really is nothing to hide lol, the problem is easy to see, AMD is just pushing the card too much and that is why its going out of spec.

AMD isn't lying either, the card is what it is. A hot mess just like what Kyle stated. All AMD has to do is downclock it but its going to get killed by the 1060 if they do that......
 
Although you made some good points, there is nothing AMD is hiding, there really is nothing to hide lol, the problem is easy to see, AMD is just pushing the card too much and that is why its going out of spec.
Agreed ... pushing the card beyond what it is capable of. It would be interesting to know if it's due to last minute changes to get performance up following the release of the GTX 1070/1080.
 
Its that or once marketing stated their TAM and VR to the masses, they had no choice, they had to get to 390, 970 level performance otherwise everything they stated up to the point of release, pretty much falls flat.
 
I think this is the second time you've insinuated a conspiracy because Dave hasn't commented. Dave doesn't speak for AMD in all matters and most posts represent his own opinion. This site is unique due to the large number of members that work in related fields and calling members out for not participating in every discussion isn't what this site should be about.

Also, there is no cover up as AMD acknowledged the issue. The discussion is about why the issue occurred at all and how important the issue is. Some think it's a bigger deal than others.
Thanks. Additionally, I'm largely at the other end of things these days (planning) so my in-depth, fine detail, execution level product knowledge is not necessarily as high as it has been on prior programs. Plus, I'm on holiday this week!

One thing to note, I don't know exactly where these latest drivers put the solution on internal measurements, but bear in mind that sites that are doing GPU level power measurements are doing so with additional components between the GPU and the power sources and these can alter the currents a little dependant on how they are filtering; power characterisation and measurements during product development are done on a "Power Automation" board, a specific design that's taking direct readings and will most accurately reflect the GPU power draw on a specific board design. GPU designs that leave a lot of margin on the bus power this isn't going to show as much of an issue, but something that is maximising the bus it highlights things a little differently.
 
In the end, barring some sort of hardware restriction that prevented further diversion of power from the slot, I am confident that fixed settings were chosen for minimum combined incidence rate projections for both slot and 6-pin, with "compliance" checkbox given secondary consideration, if any.
You have too much faith. If it wasn't done in the months leading up to the launch, I doubt it was done in 2 days after....
 
One thing to note, I don't know exactly where these latest drivers put the solution on internal measurements, but bear in mind that sites that are doing GPU level power measurements are doing so with additional components between the GPU and the power sources and these can alter the currents a little dependent on how they are filtering; power characterization and measurements during product development are done on a "Power Automation" board, a specific design that's taking direct readings and will most accurately reflect the GPU power draw on a specific board design.

Nice deflection there in trying to put the blame on the sites doing the power measurements (inferring that they are doing it wrong) and then stating that AMD "measurements during product development are done on a "Power Automation" board, a specific design that's taking direct readings and will most accurately reflect the GPU power draw on a specific board design" and then not give the results of those measurements.

Both tomshardware and pcper layout how they implemented the power and current measurements and they are not doing it wrong.

GPU designs that leave a lot of margin on the bus power this isn't going to show as much of an issue, but something that is maximising the bus it highlights things a little differently.

As an engineer I am insulted by this response as you seem to imply that it okay to violate power specifications since only some people will have a problem. Power and current specifications are there and if followed none would have a problem.
 
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Well the "compatibility mode" should be the default and they are very close to the specs, still out of spec but close, so AMD should drop that down just a bit and they would be set, let the user do their thing with overclocking and removing the capability mode, its under their volition so it will be all good from AMD's end.

Also David, I think if any of the reviewers tried other cards, if there was a margin of error from the connecting device that will be see with them too, so I don't think its fair to say the motherboard is what is causing the problem with the new drivers.
 
AMD Lists The Radeon RX 490 Flagship – Polaris based Dual GPU Graphics Card For 4K Ready Gaming
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AMD’s RX 490 gets listed on promotional page – shipping data points towards a Polaris dual GPU graphics card
The RX 490 will be AMD’s 4K ready flagship that will be taking on the GTX 1080 at a (probably) similar price point. It is going to be the crown jewel in AMD’s RX lineup. The existing Polaris based lineup currently maxes out at the Polaris 10 based RX 480 – which is roughly equivalent to the GTX 1060 in terms of graphical performance. According to AMD, Polaris 10 is the largest 14nm FinFET GPU available right now and that raises interesting questions what we can expect from the RX 490.
http://wccftech.com/amd-rx-490-dual-gpu/
 
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