AMD: Speculation, Rumors, and Discussion (Archive)

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Let me get this straight. AMD announces this thing on twitter on their main account https://mobile.twitter.com/amd/status/731549678341398528 to then announce on reddit that they are not going to show/disclose anything substantial?!?

Who is running their communication department?!
You guys need to take a chill pill. Put your blinders on and ignore what AMD does with their partners, especially as it was rather obvious to begin with that no partner session would include unreleased details. (AMD is very fond of not getting sued by their investors)

When they're ready to let us know what's going on, they'll tell us directly.:)
 
http://videocardz.com/59947/amd-to-launch-polaris-10-at-computex

AMD-Polaris-10-launch-Computex.jpg
 
You guys need to take a chill pill. Put your blinders on and ignore what AMD does with their partners, especially as it was rather obvious to begin with that no partner session would include unreleased details. (AMD is very fond of not getting sued by their investors)

When they're ready to let us know what's going on, they'll tell us directly.:)
Why would AMD communicate with their partners through their main twitter account? It makes no sense.
 
Why would AMD communicate with their partners through their main twitter account? It makes no sense.
Because they're trying to hype up their partners. Partners can be very encompassing, everything from a few high-level board engineers at Sapphire and the like, right out to retail salespeople.
 
If AMD thinks their partners can be hyped with a tweet, they must not think very highly of their own partners... ;)

(They also apparently believe people susceptible to twitter hype don't read Reddit... :rolleyes:)
 
your location of La-la land looks apt.... jesus some people need to get a grip............
Oh yeah? What's your idea of getting a grip then? Agree with AMD's apparent tactics of letting NV get all the hype and good press for the foreseeable future? Sounds like a winning strat for a player who is already on the ropes! ;)
 
Because they're trying to hype up their partners. Partners can be very encompassing, everything from a few high-level board engineers at Sapphire and the like, right out to retail salespeople.
While I have no doubt believing AMD partners are just human beings and behave as such (understatement of the century :) ) let me highlight the absurdity of hyping up hundreds of people by sending the wrong message to a few hundred thousands more.
 
GCN would definitely need more VGPRs per CU. Nvidia doubled VGPRs per thread in Pascal, and they have less VGPR pressure.
Were there similar register pressure issues pre-Pascal? I know register pressure is always something you like to avoid for CUDA, but I don't know what extent game developers struggle with it.

It doesn't help that GCN has the widest waves of modern GPUs and executes instructions in 4 cycles (IPC per thread is low -> registers are allocated for long time).
My understanding is that it executes a wave of 64 as 4 cycles on a 16 wide SIMD. I understand how the wave of 64 can give utilization issues when there's thread divergence, but once you accept that, does it matter whether or not that 64 wide wave gets executed in 1, 2 or 4 cycles? That's just an implementation issue, isn't it?
 
Oh yeah? What's your idea of getting a grip then? Agree with AMD's apparent tactics of letting NV get all the hype and good press for the foreseeable future? Sounds like a winning strat for a player who is already on the ropes! ;)
Hype will not deliver sales, The fact Polaris and GP104 seem to occupy completely difference market segments with maybe the top of polaris overlapping with the bottom of GP104 makes your kind of position even more bizarre. So what exactly should one be doing, lets not forget you cant even buy a GP104 yet, the 1070 which is the only Part of GP104 that polaris might compete with launches even latter then the 1080 and well after computex.

if you believe the rumor mill
http://videocardz.com/59753/amd-polaris-launch-end-of-may
http://videocardz.com/59947/amd-to-launch-polaris-10-at-computex

So by the time it come to buy a card that might complete with each other, we should know exactly where the different SKU's stand. At the point the 1070 is on sale and there is still crickets from AMD then Criticism start to become valid.

Right now its just .... i dont know , its something , just not very good.
Do you remember rv770, up until launch day 480 quadrupple confirmed etc, how did the 280 hype help NV?
 
You guys need to take a chill pill. Put your blinders on and ignore what AMD does with their partners, especially as it was rather obvious to begin with that no partner session would include unreleased details. (AMD is very fond of not getting sued by their investors)
I guess it's just surprising how big a difference there is between the tight communication ship that is Nvidia and left-hand-doesn't-know-what-right-hand-is-doing at AMD.
 
My understanding is that it executes a wave of 64 as 4 cycles on a 16 wide SIMD. I understand how the wave of 64 can give utilization issues when there's thread divergence, but once you accept that, does it matter whether or not that 64 wide wave gets executed in 1, 2 or 4 cycles? That's just an implementation issue, isn't it?
That's correct. Also by switching to 32 wide wavefronts while keeping the same register file size per wavefront would effectively double the per thread register file but it would cut the total number of threads in half.
 
Were there similar register pressure issues pre-Pascal? I know register pressure is always something you like to avoid for CUDA, but I don't know what extent game developers struggle with it.

I don't have anywhere near Sebbi's knowledge, but my experience is that register pressure is much tighter on AMD, to the point that if you optimize it enough to not be totally strangled on AMD hardware, you never have to think about it on nV hardware. I believe register pressure is typically worse in scientific computing than graphics, so that could be the reason for it.

My understanding is that it executes a wave of 64 as 4 cycles on a 16 wide SIMD. I understand how the wave of 64 can give utilization issues when there's thread divergence, but once you accept that, does it matter whether or not that 64 wide wave gets executed in 1, 2 or 4 cycles? That's just an implementation issue, isn't it?

The issue is that the more lanes you have, the higher the risk that any memory access misses cache. Wider SIMD requires more thread-level parallelism to hide memory latency, and that is currently mostly limited by register pressure on AMD.

That's correct. Also by switching to 32 wide wavefronts while keeping the same register file size per wavefront would effectively double the per thread register file but it would cut the total number of threads in half.

That's not as easy as it sounds. Each 16-wide SIMD pipe has four entirely separate 16-wide register files, each serving one of the quadrants of the wavefront. This design allows them to limit the amount of register ports in the register files, as 4 smaller register files with, say, 1r and 1r/w port each are much smaller, faster and less power-hungry than one big file that has more ports.
 
Hype will not deliver sales
Well, assuming you're correct, the lack of it sure as fuck won't either, I think you can agree, yes?

The fact Polaris and GP104 seem to occupy completely difference market segments with maybe the top of polaris overlapping with the bottom of GP104 makes your kind of position even more bizarre.
Oh yeah? Lemme tell you what's bizarre; that people wouldn't get influenced by NV's awesome paper-launched hardware, and instead patiently and dutifully wait for whatever tiny morsels of information AMD deems fit to dole out at their leisure - weeks later! Add to the broth; mixed messages, and multiple conferences - the first of which apparantly for no genuinely good reason at all, AMD readily admits. So how's that for bizarre for you?

Then as for different market segments - would you generally tend to go with the maker whose best product in the lineup is Lamborghini Avantdor-like in performance, or the maker which offers Vaz Lada-like performance?

"I'm a rational being and I make 100% informed decisions!", you say. Well, we're not talking about you now. We're talking about people in general. Those who do listen to hype, and shit, generally tend to buy NV anyhow, since the company has ~80% of the discrete GPU market. How do you propose to attract THOSE people with an opaque, secretive-yet-ineptly run fiasco of a PR campaign?

Or should we be like, "oh, AMD isn't aiming at selling any cards anyhow, so it doesn't matter what their PR is like!" Well, yeah, now we're really bizarre, wouldn't you say? ;)

So what exactly should one be doing, lets not forget you cant even buy a GP104 yet, the 1070 which is the only Part of GP104 that polaris might compete with launches even latter then the 1080 and well after computex.
Doesn't matter, because A: GP104 cards will be for sale before AMD has even presented their counter-offer, and B: chances are pretty good that 1070 cards will be for sale no later than polaris 10 cards, AND beat the snot out of them as well - especially where driver quality is concerned.

if you believe the rumor mill
Too bad we have to rely on rumors for AMD information, while NV has already shown their wares in public. AMD, who bragged last year they were ahead, and had an aggressive schedule and whatnot. They teased these cards back in friggin december, and since then - nothing. Even after NV's nuclear bomb of a presentation.

I like AMD (most of my graphics cards since the Rage128 era have been AMD), but god knows why, because the company sure doesn't make it easy for people to be their fans.

how did the 280 hype help NV?
Why don't you tell me, instead of asking rethorical questions? :)

Most of the years since NV TNT launched, NV has been the market leader, so one could make the case NV hype helped. :p (That and NV hardware often being just plain faster - with a few notable exceptions.)
 
The issue is that the more lanes you have, the higher the risk that any memory access misses cache. Wider SIMD requires more thread-level parallelism to hide memory latency, and that is currently mostly limited by register pressure on AMD.
That's not correct. First of all NVIDIA and AMD physical SIMD width is the same (i.e. 16 lanes) and have the same likelihood of hitting or missing data caches (if they used the same cache design, that is :) ) per clock. Of course the total number of CUs or SMs determine how many outstanding memory accesses you can have.

Second wider SIMD doesn't necessarily require more TLP to hide memory latencies. In fact for the same number of "lanes" it is exactly the opposite, narrower SIMD requires more threads to run at peak (e.g. 2 8-wide SIMD vs 1 16-wide SIMD)
That's not as easy as it sounds. Each 16-wide SIMD pipe has four entirely separate 16-wide register files, each serving one of the quadrants of the wavefront. This design allows them to limit the amount of register ports in the register files, as 4 smaller register files with, say, 1r and 1r/w port each are much smaller, faster and less power-hungry than one big file that has more ports.
The same trick works if you have the register file banks serve a subset of all registers for the whole logical SIMD width. You can get collisions and stalls from time to time but I suspect they can be greatly minimized if the compiler knows about the register banks. Moreover everything your logical SIMD is wider than your physical SIMD and you need more than one clock to operate on the whole vector than the probability of collisions becomes truly negligible. I suspect both INTEL and NVIDIA use similar techniques instead of using multi-ported register files.
 
If AMD thinks their partners can be hyped with a tweet, they must not think very highly of their own partners... ;)

(They also apparently believe people susceptible to twitter hype don't read Reddit... :rolleyes:)
I don't think the tweet is meant to be hyping. Rather it's meant to get them to come to the training session where said hype will be dispensed.:)
 
I supposse that if Polaris is really good at least a hyping controlled leak would come handy from a marketing point of view, like always has happened...
For the 1st of June the 1080 GTX will have reached the mytical new king status in all the reviews all around.Well, they know better...
 
You guys need to take a chill pill. Put your blinders on and ignore what AMD does with their partners, especially as it was rather obvious to begin with that no partner session would include unreleased details. (AMD is very fond of not getting sued by their investors)

Obvious to whom? The general public or decades-old experienced tech journalists?
AMD definitely has more direct and effective methods to reach their partners, and especially ones that won't generate hype and disappointment towards enthusiasts.
The choice of using the company's general account of a worldwide broadcasting social media platform to say "sneak peak on Polaris" seems obtuse at best.


For the 1st of June the 1080 GTX will have reached the mytical new king status in all the reviews all around.
That card is going to keep the "mythical new king status" regardless, because reportedly AMD won't have anything to counter it until somewhere in 2017 (or at best, if the latest rumors turn out correct, for another 5 months).
 
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