A Survey of Prefetching Techniques for Processor Caches

sparsh

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A Survey of Recent Prefetching Techniques for Processor Caches
Accepted in ACM Computing Surveys 2016

Part of the abstract: As the trends of process scaling make memory system even more crucial bottleneck, the importance of latency hiding techniques such as prefetching grows further. However, naively using prefetching can harm performance and energy efficiency and hence, several factors and parameters need to be taken into account to fully realize its potential.

In this paper, we survey several recent techniques that aim to improve implementation and effectiveness of prefetching. We discuss data and instruction prefetching, hardware and software prefetching and core-side and memory-side prefetching. We also discuss techniques for reducing the latency and storage overhead of prefetching and controlling the aggressiveness of prefetching. We include studies on both real processors and simulators. This paper will be useful for both novice and experts in the field.
 
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