AMD: Speculation, Rumors, and Discussion (Archive)

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http://techreport.com/news/29591/jedec-updates-hbm-standard-with-bigger-stacks-and-faster-speeds

According to this, the HBM specification has a new revision that has features consistent with what has been labeled HBM2 in prior presentations.
The capacity concerns for future GPUs that use it should be alleviated for gaming purposes, at least.
It means that what used to be called HBM2 by everyone else will be called HBM by Jedec - it's simply inclusion of HBM2 specs into HBM specs
 
Well, just need to ask him ... Its not the first time that AMD is showing stuffs to limited peoples under the door of CES or other conference show.
1. You don't think it might have been mentioned directly in the article if it had been seen running? You think an article that provided no actual information might not have had higher visibility if the lede was "AMD enthusiast card demonstrated" rather than just sighted?
2. Yes, AMD do insider presentations. AMD are also masters of presenting separate points of interest in such a way as to influence an assumption of linkage, and allowing the press/forum members to connect the dots (they aren't alone among IHV's by any means). It's called plausible deniability. Have you not witnessed this strategy before?
3. "Well, just need to ask him..." Well, that has already occurred to people who aren't willing to accept a conclusion based upon incomplete data, or those willing to explore past the best case scenario. As you can see, the response to the question is no response
sw5Q6OB.jpg
 
1. You don't think it might have been mentioned directly in the article if it had been seen running? You think an article that provided no actual information might not have had higher visibility if the lede was "AMD enthusiast card demonstrated" rather than just sighted?
2. Yes, AMD do insider presentations. AMD are also masters of presenting separate points of interest in such a way as to influence an assumption of linkage, and allowing the press/forum members to connect the dots (they aren't alone among IHV's by any means). It's called plausible deniability. Have you not witnessed this strategy before?
3. "Well, just need to ask him..." Well, that has already occurred to people who aren't willing to accept a conclusion based upon incomplete data, or those willing to explore past the best case scenario. As you can see, the response to the question is no response
sw5Q6OB.jpg
Local forums user dbz shocked to find out that rumours and speculation are just that, blames AMD conspiracy.
 
It did look like that AMD was holding back the chip displayed at CES till mid-2016 due to bigger dies being on the way as well.

Fury samples were flying around by nov 2014, hopefully it's not that big of gap to release this time.


Fury had issues and wasn't competitive with the competition hence why it wasn't released earlier, I think you are missing trying to get as much out of the architecture as they can vs. pushing it over its limits to stay competitive. A little bit of thinking could have given that answer quickly.
 
http://techreport.com/news/29591/jedec-updates-hbm-standard-with-bigger-stacks-and-faster-speeds

According to this, the HBM specification has a new revision that has features consistent with what has been labeled HBM2 in prior presentations.
The capacity concerns for future GPUs that use it should be alleviated for gaming purposes, at least.


Now that the standard is set in stone, how likely do you think it is for Fiji to be able to support HBM2 HBM rev.2 then?
 
It won't be, there is no reason for a chip like Fiji to use HBM v. 2, unless you are taking about an updated chip based on GCN 1.3 architecture? Why would they do that when they have a newer GCN architecture to use?
 
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Local forums user dbz shocked to find out that rumours and speculation are just that, blames AMD conspiracy.
You seem to missing the point. I wasn't the one putting forward the "fact" that a GPU was "up and running" when the actual facts don't bear out the statement. Secondly, the author of the source material at Tweaktown said he had sighted an enthusiast AMD GPU behind closed doors - how is that rumour and speculation unless you factor in the possibility that the recounting of the experience and subsequent article are fictional? You think that likely?
 
It means that what used to be called HBM2 by everyone else will be called HBM by Jedec - it's simply inclusion of HBM2 specs into HBM specs
It seems like this is a probable outcome. The details for Hynix's HBM2 are limited, so the disclosed features from earlier are a subset of the revision. There are other changes mentioned that could be other elements of the HBM2 devices that might have been there but not discussed, like the already mentioned thermal trip functionality. In case there are tweaks to the spec that differ from HBM2 was at the time of its disclosure, I refrained from stating that it was totally equivalent.
 
Why would they do that when they have a newer GCN architecture to use?

Because there are only two Polaris chips coming out this year, and Fiji being the youngest of the "old" architecture + being sold in cards with high margins + FinFet likely to be tested with smaller chips first, makes it the least likely chip to be replaced in 2016.

Plus, AMD chose to not name it into the 3xx family. Maybe that's also a hint of what to expect this year.
 
I would think it would be a really bad idea to use Fiji in a new line up specially in the mid range, it doesn't make any sense to do that, its power envelope will not compete well with anything out coming out, from AMD or their competition.
 
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Now that the standard is set in stone, how likely do you think it is for Fiji to be able to support HBM2 HBM rev.2 then?
The two versions of HBM are slightly different, as there are a few more signals defined per channel and globally than before to accommodate things like the protective thermal monitoring, redundancy, and a higher max stack height, so unless Fiji has a dual-mode controller it probably wouldn't work with the new functionality.
The relative timing of Fiji's being set down versus HBM2 is unclear. The GPU's development seems to line up best with the original HBM implementation, and if HBM2 had not been final by the time the GPU was, Fiji might not be able to use it as-is.
That's not the same as saying Fiji couldn't use a stack that is physically the new revision, as that revision has a legacy mode that falls back to the old version. Maybe that could be compatible.

That there is a "legacy mode" that corresponds to HBM used by Fiji is curious in itself. I'll have to review later about how this is decided, but I think it's set so that a given stack can only be one or the other. It's interesting since we only know of Fiji as a consumer of the old version, and if it could handle both what else would justify putting a mode that nothing would use?

Other questions would be what Fiji would stand to gain from the new mode. The revision promises higher performance and potentially higher power consumption for a GPU that is maxed out in power consumption while not really suffering with the bandwidth it already has.
 
It might be interesting to see in light of dropping half of the channels, and half of the L1/L2 bandwidth if the channel/L2/L1 arrangement is like that of prior GPUs.
There'd be the same aggregate external bandwidth, with double-speed memory controllers feeding into an L2 half as capable of receiving data and servicing requests.

I don't think the L2 bandwidth was put on the slides like it was with the prior generations, as far as comparisons go.
 
Plus, AMD chose to not name it into the 3xx family. Maybe that's also a hint of what to expect this year.

The 21th january, there's a webinar with AMD about " what you can expect from AMD in 2016 i"... I think, maybe, some information at this time...
 
The two versions of HBM are slightly different, as there are a few more signals defined per channel and globally than before to accommodate things like the protective thermal monitoring, redundancy, and a higher max stack height.
The stack height doesn't change. Both JEDEC papers describes up-to 8-dies (layers) with one channel per die (layer). Seems that several differences between "HBM1" and "HBM2" weren't related to JEDEC standard, but to manufacturers decision (in particular: manufacturing process, max. four layers per chip for "HBM1"…)

JESD235 (aka HBM1):
"Similarly, vendors may develop products where each memory die can flexibly support 1, 2, or 4 channels – enabling 8-channel configurations with stacks of 2 to 8 dies while keeping all data for a given channel on one die."

JESD235A (aka HBM2):
"Similarly, vendors may develop products where each memory die can flexibly support 1, 2, or 4 channels – enabling 8-channel configurations with stacks of 2 to 8 dies while keeping all data for a given channel on one die."
 
Actually, the real differences in JEDEC standardization are mainly the pseudo channel modes being definded, most of the "newsified" so called HBM2 features were already in the HBM draft. Note also that JEDEC does not even mention HBM2 in the standard.
 
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Other questions would be what Fiji would stand to gain from the new mode.

Rebranding as a 8GB card with optimized PCB and/or firmware for higher clocks / lower power consumption. Something like the treatment that Hawaii got in the 290->390 transition.
Like I said before, I'm convinced that Fiji won't be replaced in 2016.

Or how about the much more obvious use, 4-stack 8GB Fiji

This is what I had in mind. Even if they keep the memory clocks or just mildly increase them to the 600MHz that have been reported to be fairly successful to achieve in overclock.


For example, a Fury X at 1150MHz core / 600MHz memory gets over 20% better performance in Fire Strike.
 
Fiji will not gain as much as a new architecture from a new node.

If lets say Fiji gets 50-60% power consumption drop at the same performance. It has lowered DP performance, which pretty sure Polaris will have have the full shebang. It will still be hampered by poor geometry performance, which Polaris will probably remedy to some degree.

now the memory overclock in a bandwidth limited situation, do we see that in many games? I think its a combination of both core clock and memory clock that gave the best frame rate increases in most games, not one or the other.
 
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