Apple A9 SoC

As for Geekbench, AFAIK they only change compiler when doing a major new release (to keep old results are comparable).
 
Vsync cap. On-screen does less work than off-screen.

Edit: Tripppple-combo!

Allow me to point out that there's a reason why Kishonti uses T-Rex onscreen for the battery lifetime test.


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Rys or anyone else from IMG: you're most likely not aware of Apple's schedules, but it won't hurt to ask if you anyone knows when Apple will finally get its OGL_ES 3.1 drivers out?
 
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Poole just confirmed that they only update the compilers at new version releases, the next being Geekbench 4. Can't reference his post only unfortunately, there are some truly bizarre statements being made in that thread.
Link
 
TSMC's quarterly earnings in July indicated that very few 16nm chips would ship for Q3 (unlike last year where they had several times more volume in the same period nearly exclusively for Apple ) - this indicates Samsung was the lead supplier for launch, but it will be interesting to see if this changes over time.

It's also interesting to consider whether this is a 16FF process (rather than the 16FF+ that will be used by most other companies) and whether TSMC would get closer to Samsung's area with 16FF+ and/or 16FFC. It is a very impressive technical achievement by Samsung either way (and by Apple for dual-sourcing at product launch on two leading-edge processes, which is more than can be said of any back-end design team in the industry AFAIK!)
 
It is a very impressive technical achievement by Samsung either way (and by Apple for dual-sourcing at product launch on two leading-edge processes, which is more than can be said of any back-end design team in the industry AFAIK!)

Indeed, which is why so many thought it improbable.

I wonder if Apple had to compromise performance to ensure good fit between two different fabs?

I would assume so. Perhaps if they had independent resources to optimize to each process and there weren't any limitations of one process that forced design changes on the other. It's quite impressive from a management and schedule perspective.
 
If TSMC has gotten the iPad Pro order, it should end being quite a lot larger than the A8X. By time you add an extra CPU core, perhaps double the GPU cores and wider memory controller to TSMC's 104.5mm A9 variant, will it be the larger than the 'monster' A5X's 165 mm2!?
 
Makes you wonder, is one or the other chip better wrt power consumption? I'd like to see some long running benchmarks on either of them (albeit would need a sample size of more than one chip from each fab to get conclusive results).
 
Wow. A9 is dual sourced. TSMC and Samsung. Samsung A9 is 10% smaller than the TSMC version.

http://www.chipworks.com/about-chipworks/overview/blog/a9-is-tsmc-16nm-finfet-and-samsung-fabbed

For chipworks to immediately do TWO A9 chips, would suggest that whatever phone they initially got, had the AP1022 designation on it, and someone said, "hold on, the ifixit one had AP898 on it !."

So nice bit of luck that their phone had a different chip from the ifixit teardown.
 
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Same for me. Im surprised that the breakdown isn't by device. (I.e. 6s Samsung 6s plus tsmc for example)
a9chipsamsungtsmcsplit.jpg
 
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