Apple S1 SoC for Apple Watch

https://twitter.com/stroughtonsmith/status/591281283730374657

Nothing suprising - it’s running most of iOS 8.2 with Carousel instead of Springboard. Has a PowerVR SGX543 driver, so it’s A5-equivalent?
So it looks like the S1 is using an SGX543 based on the drivers.

https://twitter.com/stroughtonsmith/status/591287127591247872

Hopper happily opens Apple Watch binaries ('armv7k') to disassemble, says they're 'armv7m'.
But the CPU might be ARMv7-M so Cortex M3 or something similar. That seems very weak though. I don't think the Cortex M3 even has a FPU. For comparison the Apple M7 motion co-processor uses a Cortex M3.
 
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But the CPU might be ARMv7-M so Cortex M3 or something similar. That seems very weak though. I don't think the Cortex M3 even has a FPU. For comparison the Apple M7 motion co-processor uses a Cortex M3.
If it really is an M3 in there, and especially, if Apple is actually storing 7000 images for the animated emoji rather than animating it realtime as alledged in one of the tweets replying to that one you linked, what the hell is drawing so much power in that watch to make battery life so terrible? Pulse sensor LEDs reportedly only light up every ten minutes or so during non-exercise use, and they're also PWM-strobed, so they probably don't consume too much on the whole.
 
If it really is an M3 in there, and especially, if Apple is actually storing 7000 images for the animated emoji rather than animating it realtime as alledged in one of the tweets replying to that one you linked, what the hell is drawing so much power in that watch to make battery life so terrible? Pulse sensor LEDs reportedly only light up every ten minutes or so during non-exercise use, and they're also PWM-strobed, so they probably don't consume too much on the whole.
Could iOS even run on a M-type processor because of the lack of MMU? Maybe this means there is a main A-type processor along with a M-type co-processor and Apple is only exposing the M-type co-processor to third-party developers for now? That there still is an A-type processor present, even a slow one only used for core OS tasks, could explain the limited battery life. The SGX543 might also not be the most efficient GPU choice.
 
Could iOS even run on a M-type processor because of the lack of MMU?
No way. *IX, which iOS is built out of, fundamentally requires it. The entire security model relies on separate address spaces, otherwise one bad app(le) could crash the entire watch, or steal or mess with other apps' or OS data at will. If M3 lacks MMU it can't be the main processor.

The SGX543 might also not be the most efficient GPU choice.
How so?
 
Given the small screen and battery life concerns, if the Apple Watch isn't likely to run graphically intense apps or games wouldn't a smaller GPU like the GX5300 be sufficient? The GX5300's ALUs are also described as "low power" in their block diagrams although maybe that's just marketing rather than confirmation that they've actually been redesigned from other Series5 GPUs.

And if they do think that more performance is warranted, a newer GPU like the G6060 or G6110 provides frame buffer and geometry compression to save memory bandwidth. Imagination also claims the TMUs in the Series6XE are much more efficient than those in the Series5XT.
 
It would appear to be very un-apple like to design a purpose built soc for a new product that has very unique and tightly constrained power budgets, and then pick a previously used GPU just because it was conveient. The obvious answer is that they felt they needed the 543 for something. Another less likely alternative is that it is the GX5300, and it is compatible with the 543 driver. Mind you, IMG does mention Android in their PR on the IP.
http://www.imgtec.com/powervr/series5xe.asp

It is also interesting to note that the GX5300 is the only series 5 GPU on the IMG website, it appears they are no longer actively promoting the other series5 cores.
 
It would appear to be very un-apple like to design a purpose built soc for a new product that has very unique and tightly constrained power budgets, and then pick a previously used GPU just because it was conveient. The obvious answer is that they felt they needed the 543 for something. Another less likely alternative is that it is the GX5300, and it is compatible with the 543 driver. Mind you, IMG does mention Android in their PR on the IP.
http://www.imgtec.com/powervr/series5xe.asp
I don't think this can really be compatible with SGX 543. For starters, series 5XE uses USSE 1 so it's closer to the old series 5 in some ways.
Seems like a really odd choice, even powervr says that 6XE has better power efficiency than 5XE (not to mention other series 5 parts) - powervr recommending 5XE only for low-end smartwatches, and 6XE for higher end ones, http://blog.imgtec.com/powervr/powe...est-gpu-for-next-generation-wearables-and-iot (look at the comments).
For a custom SoC just for the watch this seems inexplicable.
 
Maybe it isn't as custom as people think. Maybe it's more or less an older, recycled iPhone SoC instead. There was even some rumors a while back that S1 would be manufactured on 28nm instead of current 20 like A8 is today. That could indicate it's not actually a new chip in that thing, but rather an existing design, probably re-heated just to save development time.
 
Maybe it isn't as custom as people think. Maybe it's more or less an older, recycled iPhone SoC instead. There was even some rumors a while back that S1 would be manufactured on 28nm instead of current 20 like A8 is today. That could indicate it's not actually a new chip in that thing, but rather an existing design, probably re-heated just to save development time.
There's indeed some speculation this could be another A5 variant. Apple already has a couple of them, though I'm not convinced yet - I'd have thought they'd really go for low power components, and the Cortex-A9 in there certainly wouldn't be an ideal cpu.
There is a Cortex M3 in there for the touchscreen controller (though not actually in the S1 itself) (iFixit got the watch disassembled - but not the S1 itself).
 
Yes, I read the teardown. Very enlightening (and...glue-y...) Especially the linear actuator was interesting, from a technical design standpoint. I expected the thing to more resemble something like a speaker, where the magnet would be suspended and used as a moving mass, shaken by a static voice coil, but instead the design turned out to be completely different.
 
Maybe it isn't as custom as people think. Maybe it's more or less an older, recycled iPhone SoC instead. There was even some rumors a while back that S1 would be manufactured on 28nm instead of current 20 like A8 is today. That could indicate it's not actually a new chip in that thing, but rather an existing design, probably re-heated just to save development time.
The easy way would be to take the Apple TV's single core A5 which was already area-optimized and shrink it from 32nm to 28nm. That wouldn't be very exciting though.
 
ABI Research has decapped the S1.

ApplewatchPCBPR2.jpg
 
AnandTech's Apple Watch review contains additional information regarding the S1.

Given that the PowerVR drivers present in the Apple Watch, it’s fairly conclusive that the S1 uses some kind of PowerVR Series 5 GPU. However which Series 5 GPU is up to debate. There are reasons to believe it may be a PowerVR SGX543MP1, however I suspect that it is in fact PowerVR's GX5300, a specialized wearables GPU from the same family as the SGX543 and would use a very similar driver.
[…]
Given the overwhelming amount of evidence at the timing level of all these instructions, it’s almost guaranteed that we’re looking at a single core Cortex A7 or a derivative of it at 520 MHz. Even if this is just a Cortex A7, targeting a far lower maximum clock speed means that logic design can prioritize power efficiency over performance. Standard cells can favor techniques and styles that would otherwise unacceptably compromise performance in a 2+ GHz chip could be easily used in a 520 MHz chip such as device stacking, sleepy stack layout, higher Vt selection with negative active body biasing, and other techniques that would allow for either lower voltage at the same frequency, or reduced capacitance in dynamic power and reduced static leakage. Given that Cortex A7 has generally been a winning design for perf/W metrics, I suspect that key points of differentiation will come from implementation rather than architecture for the near future.
 
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