How does PS4/XB1/AMD HSA RAM access actually work?

[rapso]

simplest, but not the only solution. you can just as good map memory 'un-cached' and route all access to that memory area to the memory controller of the gpu that will process it in some spare cycles with low priority.
imo there is no real contention, it's predetermined the cpu will have the slow path.

 

[Colourless]

In the Durango documentation at vgleaks, MS explicitly stated that the eSRAM is free from possible contention of CPU accesses. In other words, the CPU can't access it. That's the simplest solution. You save the connection and also the check of yet another flag of the pagetable entry (or against the eSRAM aperture, depending on implementation). Of course MS could have done it somehow differently, but apparently they didn't.

That only really means the CPU *wont* access the eSRAM by itself. It doesn't mean that the eSRAM *can't be* accessed if the developer wants to.

 

[Gipsel]

That only really means the CPU *wont* access the eSRAM by itself. It doesn't mean that the eSRAM *can't be* accessed if the developer wants to.

If it can be accessed, it will be accessed. There are plenty of CPU workloads which would profit from a large eSRAM array faster than memory. A definitive statement, that something won't be accessed is equivalent to saying that it can't be accessed directly (without making a DMA copy [move engines]).