Wii U hardware discussion and investigation *rename

[EpyonXYZ]

"fabricated by Renesas" does not even have to mean an invention of Renesas! It could just mean that it was fabricated next to (by) Renesas! </sarcasm>



What's next, are we going to have a discussion about what the definition of "is" is?







Because speculation isn't fact and in this case his speculation was wrong.







Yes. Yes. Yes.

Hey bonehead, if chipworks say the edram is fabricated by Renesas and a chipworks employee (Jim M) speculate that it could be produced by tsmc than ... do you understaaaaand or do you need more time?
Oh man and you try to explain me that speculation is not a fact owwww you bonehead. Pleas switch on your thing in your bubblehead and read clearly.

Because of your "yes, yes yes" where is your evidence?

 

[Exophase]

1.) "fabricated by Renesas" does not necessarily mean lithographically produced, because the definition of fabrication also means invention. So there is also the possibility that they mean the edram is just the conceptual invention of Renesas (a IP).

In this context it fabrication clearly refers to the lithographic variety.

1.1.) If it is lithographically produced by a Fab of Renesas than why should the person of Chipworks (Jim M ???) speculate that tsmc had lithographically produced it?
This is fishy!

It doesn't seem fishy to me at all: Jim Morrison made a very preliminary statement (or put another way, a guess) and very shortly later Chipworks stated outright that it could have actually been fabbed at Renesas.

What we see now is a description attaching a report they are selling, meaning that they've actually had time to properly analyze the produce and are no longer simply making preliminary statements.

Is Renesas anyhow able to lithographically produced such a complex Chip
like a console GPU in a 40nm process? Have they any experience with such a big chip? Would it make sense to let Renesas lithographically produce such a chip?

Along that line of thinking: would TSMC anyhow be able to integrate eDRAM in their 40nm process? Renesas is known to have the capability and has a track record of providing eDRAM for consoles, while TSMC...

 

[EpyonXYZ]

In this context it fabrication clearly refers to the lithographic variety.

It doesn't seem fishy to me at all: Jim Morrison made a very preliminary statement (or put another way, a guess) and very shortly later Chipworks stated outright that it could have actually been fabbed at Renesas.

What we see now is a description attaching a report they are selling, meaning that they've actually had time to properly analyze the produce and are no longer simply making preliminary statements.


Along that line of thinking: would TSMC anyhow be able to integrate eDRAM in their 40nm process? Renesas is known to have the capability and has a track record of providing eDRAM for consoles, while TSMC...

Ok, if the fabrication Info is newer than the speculation of Jim M. than it is clear and we do not need to discuss this. I tought that this info was realased before Jim M. started to speculate and this was fishy to me.

The publish date is Nov-12 (Chipworks site) and Jim M. started to speculate this year. So this was my problem.

 

[Kaotik]

Along that line of thinking: would TSMC anyhow be able to integrate eDRAM in their 40nm process? Renesas is known to have the capability and has a track record of providing eDRAM for consoles, while TSMC...

Why wouldn't they? They did it on 45nm and several earlier ones, too (TSMC did everything GPU related for XB360 since 2007, and at least to my understanding has done all the chips where CPU & GPU got turned into one chip, too)

 

[Exophase]

I'm not aware of the eDRAM being a part of the GPU in any incarnation of XBox 360 to date:

http://imagequalitymatters.blogspot.com/2010/07/tech-report-360s-valhalla-cpugpu-fully.html

I think there's a pretty good reason why XBox One opted out of eDRAM despite the huge die size of their eSRAM containing APU.

 

[SoreSpoon]

Ok, if the fabrication Info is newer than the speculation of Jim M. than it is clear and we do not need to discuss this. I tought that this info was realased before Jim M. started to speculate and this was fishy to me.

The publish date is Nov-12 (Chipworks site) and Jim M. started to speculate this year. So this was my problem.

Just give it up. I've accepted that 55nm and 160SPUs is the only logical possibility, and so should you. I mean, there are still some slight oddities (namely that the reason 160 was considered true in the first place was because it was assumed that the GPU is 10-15% weaker than current-gen CPUs and E3 provided enough evidence to show that's probably not the case), but that's probably explained by how much AMD's GPUs advanced between 2005 and 2008.

 

[liolio]

Just give it up. I've accepted that 55nm and 160SPUs is the only logical possibility, and so should you. I mean, there are still some slight oddities (namely that the reason 160 was considered true in the first place was because it was assumed that the GPU is 10-15% weaker than current-gen CPUs and E3 provided enough evidence to show that's probably not the case), but that's probably explained by how much AMD's GPUs advanced between 2005 and 2008.

He is right about not giving up, nobody is able to explain memory density if the chip is done on Renesas 55nm process.
Imo I think that the difference between Renesas 45nm process and TSMC 40nm is enough to explain the discrepancy we are seeing.

By the way, the number of ALUs only says that much without further details like clock speed.

 

[AzaK]

He is right about not giving up, nobody is able to explain memory density if the chip is done on Renesas 55nm process.
Imo I think that the difference between Renesas 45nm process and TSMC 40nm is enough to explain the discrepancy we are seeing.

By the way, the number of ALUs only says that much without further details like clock speed.

Clock is known to be 550Mhz though is it not? I think it was Marcan that divluged that.

 

[liolio]

Clock is known to be 550Mhz though is it not? I think it was Marcan that divluged that.

Spoiler

I missed that piece of information, thanks

 

[SoreSpoon]

He is right about not giving up, nobody is able to explain memory density if the chip is done on Renesas 55nm process.
Imo I think that the difference between Renesas 45nm process and TSMC 40nm is enough to explain the discrepancy we are seeing.

By the way, the number of ALUs only says that much without further details like clock speed.

55nm, 45nm, the point is that it's 160SPUs and Renesas is incompetent when it comes to making GPUs like this compared to TSMC. It still seems weird to me, but I have to take everyone else's word on this.

 

[liolio]

Why wouldn't they? They did it on 45nm and several earlier ones, too (TSMC did everything GPU related for XB360 since 2007, and at least to my understanding has done all the chips where CPU & GPU got turned into one chip, too)

That is not what Anandtech says:

Apparently 45nm is the magic number. The new CGPU is rumored to be made at Chartered Semiconductor, now under the ownership of Global Foundries.

 

[Blazkowicz]

I would say that apparently 45nm is the magic number where eDRAM becomes hard as hell.
Really, who knows how to do it and has mastered it for realistic production? I would say Renesas, IBM (at 32nm even) and well, hmmm.. Is there no one else, actually?

Intel has the 128MB "eDRAM" die for pairing with Haswell, I don't know which process it's on, but it's probably a misnomer as it's external (maybe it's some minimally "smart" memory, with some smart bits to work like a cache. It's certainly not inside a GPU and/or CPU though and doesn't even contain ROPs)

The Wii U GPU is a small GPU too, that can make it likely for a small player to be able to build it.

 

[Blazkowicz]

Also, Renesas merged with NEC Electronics in 2010 (as a quick check on wikipedia says) and thus inherited NEC's eDRAM technology. We knew it already I guess but it's a good reminder.

NEC did the eDRAM + ROPs die in the Xbox 360.
So in a way Nintendo ended up with technology (IP, experience, engineers) used in the X360, maybe updated to work on 45 or 40nm. It probably was useless (totally useless and unworkable even) on the 28nm node hence of no use for the new Xbox.

 

[3dilettante]

Intel has the 128MB "eDRAM" die for pairing with Haswell, I don't know which process it's on, but it's probably a misnomer as it's external (maybe it's some minimally "smart" memory, with some smart bits to work like a cache. It's certainly not inside a GPU and/or CPU though and doesn't even contain ROPs)

Calling something eDRAM has more to do with the physical device itself, rather than if it's on the same chip. The capacitors and wires are built using a physical design and process that more closely matches logic than it does DRAM.

Intel uses a variant of its CPU process to make its eDRAM.

 

[yewyew]

I had a theory (it might get me kicked, but it's worth a try). Since looking at the Latté die, people have said the SP's are too few to be 320 and too many to be 160. What if it really IS in the middle... is there a way to examine the viability of 192 SP's? Could Latté possibly be 211.2GFLOP/s?

 

[Blazkowicz]

192SP is unviable, it has to be a multiple of 80 240 SP is possible, I guess.

Or technically a multiple of 40 is possible, so 200 SP would be possible : Radeon 2400 and 3450 and the chipsets with IGP had 40 SP, though there it's about using one single "half block". One "block" of units in R600/R700 architecture is 16 VLIW5 units, or 80 "SP".
There would probably be no point in doing 200 SP instead of 240 SP (the former would maybe use more space than the latter)

 

[yewyew]

Gotcha, so 264GFLOPS is possible...

 

[Grall]

Counting the visible blocks of components on the die tells you that it can't simply be any multiple of 80/40, it has to be a number that fits with the visible features of the die.

 

[DRS]

I've read the 5th unit isn't used much by DX devs so if that's true it could be 256 (8x8x4) or 128 (8x4x4). But then number of register banks come in play too. BTW, how does having only 1 TMU per SIMD block affect a SIMD's size?

The thing with this low shader theory (or is it fact) is that ported games must be optimized for the system reasonably enough to keep up with the original PS360 version. Most devs wouldn't spend a lot of money on optimizing old PS360 games for WiiU, investigate what works and what not, to sell only 10K. So they didn't. Yet these games run reasonably on par.

When some effort is taken, PS360 is exceeded the system shows better framerate, lighting and reflections as Need for Speed proves. The Pikmin 3 screenshots that pop up all over the place now show very good ambient lighting.

If this can be done with 160 shaders, 3 less than X360 cores and 1.5GB way less than X360 bandwidth memory, there is no denial they have marvelous hardware.

 

[Blazkowicz]

Oh that's pretty for sure

The thing with this low shader theory (or is it fact) is that ported games must be optimized for the system reasonably enough to keep up with the original PS360 version. Most devs wouldn't spend a lot of money on optimizing old PS360 games for WiiU, investigate what works and what not, to sell only 10K. So they didn't. Yet these games run reasonably on par.

Or the shader compiler optimizes stuff.