WANT!!!!Yes I don't think it can quite reach GTX 480 performance in general, the numbers just don't add up. There might be some benchmarks where it's really close though.
You'd think the SMX reorganization would be a much bigger change compared to a (rather trivial) increase of cache size (compared to gk208 which already has quadrupled L2 cache size per MC over gk107 anyway it's only a doubling in any case)... Seems to imply though gpus follow the way of cpus - traditionally gpus had tiny l2 caches (but lots of "cache" as registers). Maybe it really helps for some new framebuffer compression tricks (I'm still amazed if these products really use sub-6Ghz gddr5 memory). GF100 just had 768kB (and that was considered a lot already as GT200 only had 256kB) so seeing 2MB in some midrange offering certainly ups the stakes. Heck even Hawaii only has 1MB... That of course assumes the 2MB is actually true (I have no idea if this source is trustworthy, it certainly sounds like a lot!).
My guess is 2 GPCs for GM206, 4 for GM204, and around 6 for GM200, depending on the number of SMMs per GPC (it changed from GK104 to GK110).
How significant architecturally would the SMX reorganization be?
Is it possible that there are no SFUs anymore?
You never know with these journalists, but I'll charitable assume that this is a typo and that it should be 'memory' instead of 'GPU'.
Well if they changed as much as implied by those diagrams that looks quite like a significant architectural change to me.
I hope so as I predicated that for Kepler already
.I can't see why not. Kabini's 2MB L2 cache (which I don't think is anything special or particularly dense) is below 20mm² including tags I believe (never saw a number for that, just a guess from die shot). Granted you'd probably need more cache bandwidth than what Kabini provides but I don't think it should be a particular problem from a size point of view. The problem with large l2 caches in gpus just has been that they didn't offer that much of a performance benefit presumably (hence instead of larger l2 cache they rather put one more smx on the die or something along these lines). But maybe they are good for perf/w...
You never know with these journalists, but I'll charitable assume that this is a typo and that it should be 'memory' instead of 'GPU'.
Ah, I forgot about that.
Off couse it is, with 6T SRAM and the same banks/ports count(as in GK107) additional 1792 Kbytes of cache will require 88080384 transistors. 88 mln transistors are very cheap on 28nm and they are even cheaper in terms of area since sram could have more dense layout than the rest of the chip, it's likely just 7-8 mm2 of additional area on 28nm
So ALUs are now "SIMD16" instead of "SIMD32" in Kepler? Maybe some hot-clocking is also back?
