AMD: Southern Islands (7*** series) Speculation/ Rumour Thread

[Alexko]

GloFo have zero experience on GPU parts, and there's no proof that they can get the density of what TSMC is getting.

So no, it's not really a big question. GloFo will be contracted with mid-low end parts or direct die shrink of current parts (a la 4770), probably both.

If they really need the pipe cleaner, I'd say a 12SIMD+/128bit "Barts" (~150mm² and/or a 20SIMD+/256bit "Cayman" (~200mm²) sounds about right.
They are both large enough to be real pipe-cleaners yet not too risky. They are both sensitive to cost and power but reduced R&D should be more than enough to make up the risk involved.

I'd say since Fusion/SB would have already been on shelves, a sub 100mm² part (8SIMD) would have to be very compatitive to survive, better leave it to the king of cost down. TSMC will also be contracted with a high end part (>300mm²) possibly another lower part (150~200mm²) if GloFo only got one part.

GloFo is currently making Llano, meaning they've demonstrated their ability to make <40nm GPUs, which TSMC hasn't, as far as I know. Presumably, AMD can infer the kind of density that GloFo's 28nm can reach both from information provided by the foundry, and from experience with Llano.

And naturally, both GloFo and TSMC must be making a lot of 28nm test structures, which would help AMD determine which process is best-suited to their needs. Based on currently available information, I really think it could go either way. But the decision will probably be made very soon (if it hasn't already) and AMD should reveal more in the coming months.

 

[Ailuros]

GloFo is currently making Llano, meaning they've demonstrated their ability to make <40nm GPUs, which TSMC hasn't, as far as I know. Presumably, AMD can infer the kind of density that GloFo's 28nm can reach both from information provided by the foundry, and from experience with Llano.

Someone correct me if I'm wrong but I thought Fusion APUs are to use SOI and not bulk processes?

 

[Alexko]

Someone correct me if I'm wrong but I thought Fusion APUs are to use SOI and not bulk processes?

You're not wrong. But I believe GloFo's 32nm SOI process and their 28nm bulk process are closely related. At the very least, one could expect the 28nm process to be denser, if only slightly.

Edit: well, actually Zacate and Ontario are being manufactured on TSMC's 40nm bulk process, so high-end APUs use SOI and low-end ones don't.

 

[rjc]

TSMC has yet to demonstrate their ability to make anything below 40nm and with HK/MG.

Here is a demonstration of Altera's Stratix V on TSMCs 28 HP process:
http://www.altera.com/education/webcasts/videos/videos-25-gbps-on-28-nm-fpgas.html

They put out a press release a couple of weeks ago:

"Availability Engineering samples of Altera's 28-nm Stratix® V FPGAs will be available to customers starting in the first quarter of 2011."

...so you should be able to get your own chip to play with fairly soon.

Actually, I'd expect AMD to just give the high-end to the foundry with the best process, and the rest to the foundry with the cheapest one, unless of course there's a big performance or time-to-market difference.

There is also available capacity to take into account. Quoting Morris Chang from the TSMC conference call:

"Now, I also wanted to point out that as the 28 nanometer generation, customer designs are very difficult to port between foundries. They’re very difficult to move from one foundry to another. This is a new phenomena that did not exist even in the 45-40 generation."

ie They had to decide fairly early which way to go, couldn't wait and see which process was working out best.

 

[entity279]

Maybe it's just a re-phrasal of the fact that some (GF) went gate first and others remained on gate last

 

[Alexko]

Here is a demonstration of Altera's Stratix V on TSMCs 28 HP process:
http://www.altera.com/education/webcasts/videos/videos-25-gbps-on-28-nm-fpgas.html

They put out a press release a couple of weeks ago:

...so you should be able to get your own chip to play with fairly soon.

Thanks, I'd missed that. Of course FPGAs are relatively "simple" and usually first, but that's still something. On the other hand, GloFo has taped-out qualification vehicles based on Cortex A9… I'm not sure which accomplishment is most significant.

There is also available capacity to take into account. Quoting Morris Chang from the TSMC conference call:


ie They had to decide fairly early which way to go, couldn't wait and see which process was working out best.

Yes, capacity is important. It's not as crucial for the high-end as it is for the low-end, given the volumes involved, but it sure is important. GloFo bragged a lot about ramping-up 45nm much faster than TSMC did 40nm, we'll see whether that happens again at 28nm.

As for the porting bit, well, I'd assume AMD could make two designs in parallel, at least in the earliest phases… I really don't know how realistic that is. That said, I wouldn't discount the possibility of Morris Chang making this statement deliberately to reassure investors, essentially telling them that customers can't leave TSMC because it would be too complicated. There probably is at least a kernel of truth in that, but he might be exaggerating a little bit.

Time will tell.

 

[Blazkowicz]

will there actually be a 28nm Southern Islands? (or what is the current geography as of now)

Or is it canned and AMD will go for a next-gen architecture instead? I find it funny to speculate on made up "bigger Cayman" specs without actually knowing anything and whereas nvidia will put out Kepler GPUs in competition.

 

[caveman-jim]

Do we have confirmation that Southern Islands is the next series' codename?

 

[-The_Mask-]

I think, Southern Islands somewhat the same architecture as Cayman @ 28nm and Hecatoncheires new architecture.

 

[MarkoIt]

I think, Southern Islands somewhat the same architecture as Cayman @ 28nm and Hecatoncheires new architecture.

The Hecatoncheires codename has been around for too much.. i don't think it's real.

According to Charlie, Ibiza (aka Cayman@32nm) was supposed to be the high-chip and fit the sweetspot strategy (250 mm^2). If this is true, it could mean that AMD will go back to the sweetspot for the next-generation. So, no uber-spec for RV1070, but more likely a 30 to 50% increase from Cayman (36 SIMD?)

 

[fellix]

Rumoured specs for the next generation of Radeons on 28nm -- 7000M Series will be the tryout for the new tech:

Codenames:
-Wimbledon
-Heathrow
-Chelsea
-Thames

¿Release date?:
2Q 2012
PCIE 3.0

Wimbledon (portable Cayman)
40%+faster than Blackcomb (wich is a card based on Barts)
2-4GB GDDR5
256bit
65w

Heathrow
1.5-3GB GDDR5
128-192bit
35-40w

Chelsea
1GB GDDR3/GDDR5
128bit
20-30w

Thames (twice the performance of Seymur, HD6400M 64bit)
1GB GDDR3/GDDR5
128bit
15-20w

Source

 

[Ailuros]

You're not wrong. But I believe GloFo's 32nm SOI process and their 28nm bulk process are closely related. At the very least, one could expect the 28nm process to be denser, if only slightly.

Edit: well, actually Zacate and Ontario are being manufactured on TSMC's 40nm bulk process, so high-end APUs use SOI and low-end ones don't.

Combine your edit and fellix's last post above and it might be easier to speculate what they might be planning. I've no idea myself but I'd personally vote for the safest path too

 

[TKK]

¿Release date?:
2Q 2012

The way I understood the article(s), Q2/12 is for Wimbledon, while release or at least production start for some of the other chips is planned for Q4/11.


What I'm curious about: In the past, mobile chips usually released a few months after desktop parts. I wonder wether that means we'll get desktop 28nm parts in 2011, or wether AMD simply regards mobile space as more important for that product cycle?

 

[Blazkowicz]

that would be not unlike the GT21x family from nvidia : no architectural improvements that give easy perf increases, an expensive new process that does bring lower watts but no lower cost at first; thus the chips are first put on laptops where a better performance/watt is most critical.

 

[tannat]

GloFo have zero experience on GPU parts, and there's no proof that they can get the density of what TSMC is getting.

So no, it's not really a big question. GloFo will be contracted with mid-low end parts or direct die shrink of current parts (a la 4770), probably both.

If they really need the pipe cleaner, I'd say a 12SIMD+/128bit "Barts" (~150mm² and/or a 20SIMD+/256bit "Cayman" (~200mm²) sounds about right.
They are both large enough to be real pipe-cleaners yet not too risky. They are both sensitive to cost and power but reduced R&D should be more than enough to make up the risk involved.

I'd say since Fusion/SB would have already been on shelves, a sub 100mm² part (8SIMD) would have to be very compatitive to survive, better leave it to the king of cost down. TSMC will also be contracted with a high end part (>300mm²) possibly another lower part (150~200mm²) if GloFo only got one part.

I would think that a direct die shrink is least likely. TSMCs specific process probably affects the design too much. I would guess that it's better to design a similar mid end chip specifically for the GloFo process.

 

[no-X]

+ HD 4770 wasn't a die-shrink

 

[racca]

+ HD 4770 wasn't a die-shrink

It is if you discount the SIMD count. And changed SIMD count is in no way comparable to the changes needed for a die shrink.
I said 4770-style because it might have 20 SIMD and it's "direct" because there was no other material change whatsoever.

 

[TKK]

It is if you discount the SIMD count. And changed SIMD count is in no way comparable to the changes needed for a die shrink.
I said 4770-style because it might have 20 SIMD and it's "direct" because there was no other material change whatsoever.

RV740 also had a different ROP/mem controller-ratio (16/128bit instead of 16/256), UVD2 and iirc some other minor architectural changes (inherited from RV730/710).

I know what you mean, but I don't think you can call it a direct shrink.

 

[Sound_Card]

My theory is that SI was the original plan. NI only came about with TSMC's 32nm shut down. What I want to know is... will they...
A) continue SI with 28nm
B) Stick with NI but shrink NI on 28nm
C) New arch on 28nm all together

 

[UniversalTruth]

Yeah, and my theory is that neither NI, nor SI were part of the initial plan. Perhaps there was something different, with a different name, for example Hecatonchires . Later, they split it and NI and SI were born. Also, me thinks, that the architecture for SI will be further improved. Not just a simple shrink to 28 nm.