So, do we know anything about RV670 yet?
- Thread starter nicolasb
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Er... no. Moving to a smaller process does nothing to transistor count except transistors per unit area, not "you can magically combine multiple transistors into one single one."
Probably. But more so is the assumption that customers care about the difference between 10% and 20% CPU usage. I don't know what the "CPU usage" of my TV, receiver, cable box or cable modem is and I don't care. I'd say it's the same for the vast majority of consumers out there using their PC's to play HD content. OEM's would probably pay a lot more attention though.
Proof please? I've yet to hear someone saying "Oh, I'll buy card X because of it's media features and HD acceleration" And since both vendors have it in some form, most users don't care since they're getting it this way or the other in some form with any current card.
Also, only OEM machines with ATI I've seen around here are those in supermarkets like Aldi standing next to vegetables on a big pile. Dell, HP etc. barely have any ATI cards in them as of right now.
Though I'm rather positive that it will change for the better with RV670 if it holds what it promises and isn't late (remembering the moved R600 press event and such here).
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No it can't. Just "almost as good".
That's always been something I've wondered. Yes, logic says you can't emit a transistor when shrinking a design, but...
...but I still wonder how G71 has 25M less transistors than G70.
Rys says:
You best check out Dell's latest offerings, then. XPC boxes now come with your choice of nV or ATI cards. IF they are offering them for systems, they already have "guaranteed stock" from AMD. You think Dell jsut calls up AMD "Hey, I need about 3 2600's..can you ship?"
Seems you need to open your perspective a bit there.Do you have any proof / evidence upon your response? If so I would like to see it, otherwise I don't believe you.
Sorry
for that type response from me....Edit: What I was always wonder that Nvidia NV30 using 130nm tech with amazing 222Million transistors at that time frame was a lot for 130nm, but once you shrink to smaller process then you reduce heat and more space available on smaller process that you could have less transistors for the same chip or more if you made changes to the GPU. (Somebody speak if I'm wrong).
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It could have been optimizations that they could have done on 110nm, but waited (the short time) until 90nm to implement them. (ambiguity in Rys' statement from what I'm reading).
There certainly are differences to be made at the transistor level in order to achieve similar clock speeds or to deal with the static power consumption though, but that's more related to the transistor itself. The "90nm libraries" would be on how the transistors are constructed.
Personally myself none.
The transistor count between processes doesn't change. The die size shrinks going from 80nm to 55nm due to smaller transistors. I think you're confusing die size and transistor count.
Did not quite get it; sorry for my lack of knowledge, could you explain in other words please.
That doesn't isolate any single element. To understand if the shader organization and compiler are not "effective" or have "bad utilization" you need to isolate exactly what is run on the on the shaders post compilation.
I think its more sensible to consider the ratios in terms of texture quads to pixel quads.
If no customers care about it then why the FUD from the competition in the first place?
Here are a few examples from the likes of Dell, Apple, Gateway, that are already shipping.
Tim gave the same explanation in different words, but I will try again. A smaller process implies smaller transistors. This means you can fit more transistors in the same area. Say you have a 15mm x 15mm chip. At 80nm this chip has 600 million transistors. At 55nm this chip could have 700 million transistors and still be 15mm x 15mm.
Note that the numbers I chose are purely arbitrary and I didn't even both with math to adjust for the theoretical scaling factor. The important thing is the smaller process fits more transistors into the same area.
I think I almost got it. But one more question? Why do you think if it's true that RV670 will have more transistors on 55nm vs. R600 on 80nm.
Edit: Or is it because ATI did not had enough transistors on 80nm tech to fit extra features, but only was possible on smaller process which ATI will use 55nm.
Going down from 512 bit bus to 256 + optimizations + 55nm node = Die shrink
Now they could of decided to keep the same size die as the r600 to bolster the ammount of transistors which in itself would give them room to add more features, but I think I heard somewhere that the die was smaller on the Rv670.
So theres a fair possibility that theres not enough room on die to add dedicated AA support like some have posted about. Looks like they had room to add UVD and DX10.1 upgrades though
Yes, ATI didn't have "room" for UVD in 80 nm. No, RV670 doen't have more transistors than R600, it has less.
They would of had more though if they kept the same die size, but apprently its smaller so 666 seems about right, but one has to wonder why AMD/ATI have decided to go this way when they could of easily added more performance by keeping the die the same size as the r600 by adding what they need to correct all the issues they had with r600....and when I say issues I mean performance issues relative to Nvidia's products.
Ofcourse one can say that it was done to lower costs, but at what cost to performance and is it what AMD/ATI really need at this point ? Win in the cost bracket but loose in performance ? Which initself leeds me to believe that AMD/ATI have decided to target the mainstream more and us enthusiasts a bit less.
