AMD: R7xx Speculation

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Framebuffer content for video out.

Ok. So the two gpu share framebuffer AFR related content through CF connection. With an internal port like the CF-X sideport, each gpu gains direct access to the other gpu's MC hub, maybe having the chance to directly write into the other gpu framebuffer or maybe even to share some resources of the other gpu core...
 
For 1-2 years down the line 1GB vram might be quite usefull?
Any word on a 4870 with 1GB vram?

It can be, especially if you use 1080p res and up. I think that by the end of July the production of GDDR5 could have ramped up enough to permit a decent availability of 1GB products (given the fact that R700 should be launched at the end of August).
 
It's a great chip. especially given it's size of course, but I have a hard time calling an upper-mid range card too many superlatives. If it were the absolute perfomance leader by more than 50% or something crazy like that, maybe.

Sort of like how G71 was praised for its efficiency in comparison to R580 even though R580 was generally quite a bit faster, although G71 could catch up in a few titles and surpass it in OGL titles? Sorta like Rv770 compared to GT200 (4870 vs GTX 280). Although to be fair the GTX 280 is more often faster by a fair bit than the 4870. The flip side though is it's also significantly more inefficient than the 4870. When viewed in light of a R580-G71 comparison (for perf/mm^2).

Let's see, what did Nvidia do about that? Hmmm, oh yeah the GX2. ;) And what's ATI going to do about the current situation? Oh yeah 4870x2 (or whatever R700 end up being called).

The more things change...the more things stay the same.

Either way the Rv770 does deserve a significant amount of praise for what it has accomplished. Not only in comparison to where it came from (R600) but also in light of the competition (GT200).

Regards,
Croaker
 
Hexus review says the/a ringbus does still exist & is the link between L1/Vertex cache & L2/MC/ROPs :smile:

No, the L1/VC and L2 have their own network of busses (~384 GB/s) to communicate, which allows the L2 to broadcast their respective datas to the L1's. The L1s are tied to SIMD cores, while the L2's are tied to memory channel.

The L2s and other heavy hitters (raster backends mainly) are tied to pairs of memory channels directly. A hub now also exists, but is only used by clients that have low bw. It's a mixture of 600/500 memory subsystems.
 
Is the high-level diagram used by techreport directly from AMD?
That's the image that has 16 sections per SIMD, but if the little yellow dots are ALUs, there are 160 per SIMD.
A minor blooper, I suppose.

I did notice that, compared to other diagrams of R600, the tesselator plugs into more things, and shader export plugs into the vertex assembler.
 
Is the high-level diagram used by techreport directly from AMD?
That's the image that has 16 sections per SIMD, but if the little yellow dots are ALUs, there are 160 per SIMD.
A minor blooper, I suppose.

I did notice that, compared to other diagrams of R600, the tesselator plugs into more things, and shader export plugs into the vertex assembler.

Yeah, that's from AMD, and yes it's blooped, since the one with the SIMD array has the proper count...unless they have, gasp, 1600 ALUs, with 800 for redundancy:D.
 
Hm, peering at the RV770 die-shot now, why I have the weird feeling that this CF sideport is just a second PCIe switch alongside the "host" one...!? :???:
 
4xAA 108FPS
8xAA 101FPS
8xTSSAA Q 91FPS

Screenshots in the SkyDrive again.

http://cid-1b1908eb94064033.skydrive.live.com/browse.aspx/Public

Doesn't look its working :!

Check the Beyond3d pics , it should work something like that.
http://doomstar.awardspace.com/Edge_detect_AA_mode.html

Anyways , Edge days are over.

If you have a 38XX and want the best quality at least performance hit then use :
8x Edge Detect + Quality Adaptive AA

episode2.gif


If you have a 48XX and want the best IQ at least performance hit then use:
8x box + Quality Adaptive AA

http://anandtech.com/video/showdoc.aspx?i=3341&p=10
"The RV770 actually shows a bigger performance hit from enabling their tent filters than RV670. This is likely because the filters are run on shader hardware in both cases while RV770 has faster hardware resolve that can be used for normal AA resolve. If RV670 resolves "box" filtered AA on the shader as well this would explain the flatter performance in that case. Even more so than the image quality question, the fact that they perform lower really should be the nail in the coffin for AMD's tent filter garbage. "

http://www.rage3d.com/reviews/video/atirv770/architecture/index.php?p=6

"the RV770 handles 4AA samples per clock and is thus capable of outputting 16 pixels per clock even with 4X AA, whereas the R600 could only manage 2 samples per clock, which resulted in it outputting only 8 pixels per clock with AA enabled."

"Many of these improvements are tied to the redesign of the Color Blender block (CB), which took away unnecessary functionality and allowed the aforementioned doubling of AA rates."

So tent is out , MSAA is in.
 
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So tent is out , MSAA is in.
If you look at the techreport figures, you can see the same:
http://techreport.com/articles.x/14990/7

There's not much reason to use the tent filters (at least those using less than 8 samples) since quality will be worse and performance lower than a base 8x mode. Edge detect 12x seems to be useless too on a quality/performance metric compared to 8xMSAA. Only if you want the best quality possible use 24x ED.
However, it should be noted that MSAA scaling can be FAR different depending on the game (and possibly even within the same game depending on the area I guess).
http://www.computerbase.de/artikel/...0_cf_hd_4870/5/#abschnitt_aa_und_afskalierung
 
Folks, the day has finally come when this thread has outlived its usefullness. Please take general conversations about 48xx to the reviews threads in 3D Hardware. If specific instances of theoretical discussion of some element of RV770 or the cards based on it still seem warranted, feel free to open new thread(s) specific to those elements.
 
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