Not sure what you mean here? Balanced means that the pipeline throughputs match under certain circumstances, for example if the rasteriser has a...
Unfortunately I can't speak for IMG as I don't work for them anymore, so perhaps the guys from PowerVR/IMG could explain why they've worded it as...
I guess you're unaware that tiling is basically the same as course grain (conservative) rasterisation, and is no more of a bottleneck than...
I agree it does work quite well, but to say it again it isn't sufficient to solve the back end ROP BW issue, not even close. There's two answer's...
I can be 100% certain because it's what I do for a living ;-) Seriously, practically FB compression is somewhat limited when compare to the...
Modern IMRs most definitely do break primitives down into screen space tiles to render them, there was even a thread on here a while back where...
Modern IMRs are not just tile caching, they cache triangle parameters and submit to a tile locality, for small geometry sets this looks exactly...
Hmm, I can't read BXS without inserting some ***** ;-)
Sorry, but that's simply not correct, in all modern TBR/TBDR architectures ALL geometry processing happens before tiling, as such the GS does not...
Everyone, really? Care to name those, beyond Qualcomm, who are actually shipping their own GPU tech in the mobile AP space in any significant way?...
That's interesting, I can think of quite a few compute workloads that could benefit from significant short term clock boost, I guess vendors just...
I don't think compute is a poor excuse of turbo clocks, in fact I think the exact opposite is true, however if the higher clocks are only being...
Gaming isn't the only use of the GPU, many compute uses e.g. local photo or video editing/enhancing would definitely benefit from higher burst...
You can't use different architectural generations as examples of higher clock != lower power efficiency, it's a completely meaningless comparison,...
To answer Sebbi's question differently, there's no "modality", there's F16 and F32 ALU's, what's executed only depends on the instruction being...
