fellix

Was this ever proven? The shrunk SIMD logic was more likely area layout optimization, similar to what was employed for Zen 4c.

The RDNA3 CU can do 128 Dot2 op's/cycle (512 total op's) for both 16 and 8-bit types. Whatever RDNA revision will be in PS5 Pro could be...

I wonder if AMD was kind of cornered by its market position to "brute force" the RDNA3 design -- just more of everything (caches, VGPRs...

Only if Nvidia breaks from their two-level cache hierarchy. My understanding is that Nvidia really tries to avoid the chiplet/tile route...

https://chipsandcheese.com/2024/01/28/examining-amds-rdna-4-changes-in-llvm/