standing ovation
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It probably is inefficient. But it is a workable solution that should benefit hardware AND software companies. What good is a processor if you cannot program it ... profitably?
Predict: The Next Generation Console Tech
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It probably is inefficient. But it is a workable solution that should benefit hardware AND software companies. What good is a processor if you cannot program it ... profitably?
archangelmorph
Veteran
No it isn't a practical solution in the games space..
With console game development sitting as close to embedded software development as you can get, any attempt to leverage the time saved using some form of auto-parrallelisation in the early stages of development will only create MORE work at the optimisation stage..
These technologies, whils't sounding great on paper, have very little application in the games development arena as not only does it abstract vital control of your application parrallelism away from you it'll also never provide a strong mechanism for leveraging the most out of your hardware & likely provide you with a sub-optimal solution which is far from desirable if you plan on implementing a competitive multi-threaded engine..
Agreed.
standing ovation
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The proprietary systems you guys are talking about will take longer to leverage both in terms of manufacturing and software development. And who's got the resources to be this heavily vested one product -- a product that, because of the state of the economy and competition, is unlikely to be as ubiquitous as it was in previous generations?
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Vitaly Vidmirov
Newcomer
Current PPE design is seriously flawed. High latency cache, strange pipeline quirks.
I prefer one healthy horse to two exhausted
Greta find Pana - I wouldn't have even come into this thread if I hadn't seen Vitaly's post as the most recent, so I knew there had to be something good going on!
I remember reading some time in the last two months plans for an IBM many-core cache-based architecture with a vector bent, and I wonder if this patent is reflective of said architecture. Of course, I've tried and tried to find that article since but I've had no luck - anyone know what I'm talking about?
Anyway although this chip is clearly in the league of Cell and Larrabee, I'm still a little reserved in my adoption of it as the successor to the chip outright vs being another branch in the space. The reason I say this is that even with Sony having spun off its SOI (and other) fab capabilities, the STI alliance remains active. Now, it could be that the sole purpose of the alliance at this point is to co-fund/develop process shrinks and the eventual 32nm redesign for a slim-line PS3, but if there is actual progression in the architecture at work, then I would be a little surprised if Toshiba assented to the added complexity for STI purposes vs keeping a true Cell architecture branch alive.
I definitely invite any theories/insights on the subject.
Speaking of Cell, here's a significant client win in the finance space from the last couple of days; wouldn't have run into it were it not for my (fruitless) search for that IBM piece I alluded to earlier:
http://www.hpcwire.com/offthewire/F...curities_Derivatives_System_Using_CellBE.html
I remember reading some time in the last two months plans for an IBM many-core cache-based architecture with a vector bent, and I wonder if this patent is reflective of said architecture. Of course, I've tried and tried to find that article since but I've had no luck - anyone know what I'm talking about?
Anyway although this chip is clearly in the league of Cell and Larrabee, I'm still a little reserved in my adoption of it as the successor to the chip outright vs being another branch in the space. The reason I say this is that even with Sony having spun off its SOI (and other) fab capabilities, the STI alliance remains active. Now, it could be that the sole purpose of the alliance at this point is to co-fund/develop process shrinks and the eventual 32nm redesign for a slim-line PS3, but if there is actual progression in the architecture at work, then I would be a little surprised if Toshiba assented to the added complexity for STI purposes vs keeping a true Cell architecture branch alive.
I definitely invite any theories/insights on the subject.
Speaking of Cell, here's a significant client win in the finance space from the last couple of days; wouldn't have run into it were it not for my (fruitless) search for that IBM piece I alluded to earlier:
http://www.hpcwire.com/offthewire/F...curities_Derivatives_System_Using_CellBE.html
On the subject of digital distribution.
http://news.yahoo.com/s/nm/20080603/wr_nm/timewarnercable_internet_dc
http://news.yahoo.com/s/nm/20080603/wr_nm/timewarnercable_internet_dc
Remember that depending on when the next XBox and PS launch, our current understanding of what a CPU and GPU are (in the discrete sense) could be significantly altered. I think everyone's waiting to see what happens on this front, but it will be the point of interest as far as computing goes in 2009/2010.
Sounds a lot like you're asking for SPEs!
On a serious note I know what you mean, but the language doesn't evoke it. Maybe having said several complex cores with strong branch prediction would have more reflected your angle.
The games division has been roughly break-even since the second half of the past fiscal year; at the same time, in the first half, they did indeed lose roughly ~$1.4 billion. This is the thread for the financial figures, and ost #6 is all that's required for a quick synopsis through the quarters/years: http://forum.beyond3d.com/showthread.php?t=48083
Now, obviously for the games division to be only breakeven means that the PS3 itself is still losing money, but at the same time that $120/unit figure comes from nowhere that means much; it's just another random analyst stab at it.
Not quoting the text, but also not sure where you get your ideas of Microsoft's loss-tolerance from. They've already gone on record essentially as saying "no more" to losses; don't expect either company to start a war of attrition anytime soon.
Panajev2001a
Veteran
Greta find Pana - I wouldn't have even come into this thread if I hadn't seen Vitaly's post as the most recent, so I knew there had to be something good going on!
I remember reading some time in the last two months plans for an IBM many-core cache-based architecture with a vector bent, and I wonder if this patent is reflective of said architecture. Of course, I've tried and tried to find that article since but I've had no luck - anyone know what I'm talking about?
Anyway although this chip is clearly in the league of Cell and Larrabee, I'm still a little reserved in my adoption of it as the successor to the chip outright vs being another branch in the space. The reason I say this is that even with Sony having spun off its SOI (and other) fab capabilities, the STI alliance remains active. Now, it could be that the sole purpose of the alliance at this point is to co-fund/develop process shrinks and the eventual 32nm redesign for a slim-line PS3, but if there is actual progression in the architecture at work, then I would be a little surprised if Toshiba assented to the added complexity for STI purposes vs keeping a true Cell architecture branch alive.
I definitely invite any theories/insights on the subject.
Speaking of Cell, here's a significant client win in the finance space from the last couple of days; wouldn't have run into it were it not for my (fruitless) search for that IBM piece I alluded to earlier:
http://www.hpcwire.com/offthewire/F...curities_Derivatives_System_Using_CellBE.html
Why couldn't STI adopt this kind of new evolution of the many-core concept for CELL 2.0/3.0
?It is true that ISA compatibility and binary level compatibility would go out of the window a bit, but in the RISC space that is kind of common practice.
Performance wise PS4 will likely not be the huge jump PS3 was over PS2, but software emulation of PSOne and PS2 software will be present on PS4 IMHO and quite mature too. PSOne emulation on PSP convinced me Sony has some incredibly talented people in their "emulation group"
.PS3 emulation would be present on a per title basis IMHO: imagine a general emulator with various per title customizations and hard coded optimizations that gradually evolves over time: the same strategy I hope Sony is working at now for PS2 SW emulation on GS-less PS3's.
The major bonus that would come by a cache based approach would be the massive investment in tools and in brain power so to speak (that kind of multi-core design is the one most people are researching) that the entire industry is pouring in.
Two-way SIMD (still SoA style) + swizzle instructions (I hope broadcast instructions make a comeback too
) makes Pana and Faf or so I hear happy . Real-men SIMD with a twist
.The entire reasoning behind analysing the numbers for the games division in isolation is a bit suspect. The PS3 uses parts supplied by other divisions within Sony, divisions which are profitable in part exactly because of this. So is Sony as a whole loosing money on the PS3, and if so, how much?
We don't have the numbers to say.
Add the intangibles on top of this, the biggest probably being the role of the PS3 to help push Blu-Ray as a format, which helps drive sales of other Sony hardware, yields revenue in licensing, and promote sales from their media content divisions. The full picture is really very difficult to assess.
(Microsoft is just as big an enigma but in the other direction - is their console effort helping their main cash cow, the OS+Office, or is it weakening the OS business by migrating games developers to consoles, reducing PC appeal in terms of entertainment? The threat of Sony attacking the PC platform from the living room now seems far fetched, not only in view of sales but also because today it's clear that the main attack comes from mobile space, not the TV couch.)
Vitaly Vidmirov
Newcomer
SPE's are brilliant. I don't think the return to cache-based architecture has any sense except for compatibility with legacy code (that is the problem of course)
It is not a problem of hardware what it is programmed with inflexible imperative language. This is a good chance to invest mentioned "brain power" into the right thing.
Panajev2001a
Veteran
True (and yes SPE's are brilliant... although with support for swizzle and broadcast instructions they could be even MORE brilliant
), but you also have to consider the tools (compilers, programming languages extensions, and new programming languages) all catered to cache based multi-core architectures.When you think about CELLv2/v3 you have to think about the whole stack: from the HW itself, to the OS, to the compilers, debuggers, general abstraction libraries you provide, etc... You attack the problem from several angles and you make big changes and compromises where necessary. Some might pay off more than others and some might not.
Local Stores have the problem of ballooning up the thread's context size and put a stop to the plethora of light threads approach that everyone else and their mother in the industry is pouring tons of R&D resources on (including the academia).
Also, likely such a shared cache (in the cluster) would have lockable cache lines so if you do find the benefit from working with local working memory you would be able to do so.
CELLv1 was the right thing at the right time: refusing to evaluate what is going to be best in 2011 and forward, even if it means some big changes, can do more harm than good.
I do believe CELLv2/v3 is going to be cache based and no, I do not think that if you had to go with caches you would want them between LS and RAM, but you'd go with a structure more similar to the one you see in these latest IBM patents and in Larrabee documents
.I agree with Vitaly Vidmirov, and why? It's because of this article...
http://news.minnesota.publicradio.org/features/2005/11/22_ap_xboxroch/
http://patft.uspto.gov/netacgi/nph-...50&s1=7234017.PN.&OS=PN/7234017&RS=PN/7234017
http://news.minnesota.publicradio.org/features/2005/11/22_ap_xboxroch/
Panajev2001a's finding is great, I think it's the processor that will become the heart of Xbox 720. Eric Mejdrich, Adam Muff are on a patent like this too:
http://patft.uspto.gov/netacgi/nph-...50&s1=7234017.PN.&OS=PN/7234017&RS=PN/7234017
Sounds a lot like you're asking for SPEs!
On a serious note I know what you mean, but the language doesn't evoke it. Maybe having said several complex cores with strong branch prediction would have more reflected your angle.
That is exactly what I meant, something like a Quad Core, Core 2 Duo Intel processor. My language was a little clouded but since everyone is experts here I though people would understand.
This brings me to something I have always wondered about. Why is it that Consoles always only use relatively weak PowerPC processors from IBM instead of the, as far as I know, much more advanced and efficient Intel or AMD processors?
Correct me if I am wrong, but the PowerPC cores in each of the next generation consoles are rather primitive compared to the Intel and AMD ones in terms of optimizations such as branch prediction and other techniques, advanced pipelines and other such things that increase efficiency without increasing clock rate etc.
If they want SIMD instructions then I believe all current I32 processors like the Core 2 Duo have SIMD cores that could be exposed by throwing away the I32 layer that sits on top of it. I know that at least this is true for AMD processors.
Wouldn't a move to those kind of processors not increase a consoles efficiency per watt? What is stopping them then? Maybe IBM processors are cheaper? Anyone know?
The 120$ loss, I believe I heard is something SONY themselves quoted as being what they are currently loosing per PS3 unit sold. It was discussed in an article where the author was trying to reason that their current actual losses might be twice that.
My ideas of the competitor being in the business not first and foremost to make money but for the simple reason of crushing the competition no matter the cost I have ascertained from their previous business practices in addition to what I feel is the real reason they entered the console industry and lastly because no other company that I know of would tolerate a 8 year loosing streak in one of their divisions.
Several issues here.
The primary reason x86 isn't used is because of cost, microsoft learned that the hard way last generation. As a console maker it is imperative that you own the IP for the ICs in the console so that you can integrate the various components into fewer and fewer ICs as a cost cutting measure over time. That is why the PS2 is cheap as dirt and still selling whereas the old XBOX was killed the instant the 360 arrived. Having an single external source for your CPU silicon which insists on maintaining high margins on the parts is a financial disaster for a console vendor.
The reason the CPUs (PPU in CELL and the XCPU core in 360) looks the way they do is because of two issues. Power usage and time-to-market.
If you want to stick a bunch of cores on a die power usage becomes an issue. If you at the same time wants to maintain a execution unit heavy design for techical or marketing (paper flops) reasons, you have to cut corners somewhere.
At the same time these CPUs are developed under a strict schedule. The CPU *has* to be ready at launch time. Unlike "real" CPU vendors you cannot postpone release. IBM has used automated tools to a great extent when developing the PPU/XCPU, which has resulted in a long pipeline, long latencies and a somewhat high power usage (which feeds back into the above negatively), but they got there on time!!. Note that a lot of effort went into making the SPEs small, fast and low power, so that part of CELL really shines.
Both IBMs Power4 and 5 were designed in a similar way, and all more or less shows the same deficiencies, like the 2 cycle latency for simple integer operations (compared to the single cycle latency of the much higher clocked Power 6 architecture)
PA Semi (now owned by Apple if DoD allows the take over to go through) has proved that you can build a high performance, low power PPC CPU.
Cheers
Panajev2001a
Veteran
It would be a loss for STI IMHO... also that kind of CPU has almost nothing coming from Xenon and lots coming from CELL (see SPE and VTE similarities as well as the BTE for group of VTE's, etc...).
The patent I quoted is basically a CELL evolved to take on the cached based approach, but it is still a heterogeneous architecture while Xenon was a more classical SMP cpu and maybe MS wants to continue on that paradigm for Xbox 720.
I still think CELLv2/3 will be cache based...
So, maybe both MS and Sony will use CELLv2/3...
.I think that One is right on this one, it sounds like a possible candidate for the up coming xbox.
In the patent le lineage with the PowerPC 970 is really clear, was the xenon a derivative from this CPU?
Could this patent be Wii2 related?
How many transistors the PowerPC 970 included?
A wide are the SIMD unit in the Xenon?
The patent hint at crunching chunk of 64 bits, isn't that tiny, current SSE works 128bits vectors, sandy bridge is supposed to handles 256?
I find the part on the "sort of north bridge" really interesting.
But it's unclear to me if they speak about two chips on the same die (cpu + "north-bridge) or about an completely external chip.
The purpose of the device seems to accelerate communication between the cpu and the GPUs (seem design to connect with more than one device).
It's not clear if it works as a real north-bridge and manage main RAM acess?
Anyway super interesting, in fact I would say that it's the first relevant information in regard to nextgen systems we are provided with.
One, hand down
EDIT
How access the figure on the patent page?
In the patent le lineage with the PowerPC 970 is really clear, was the xenon a derivative from this CPU?
Could this patent be Wii2 related?
How many transistors the PowerPC 970 included?
A wide are the SIMD unit in the Xenon?
The patent hint at crunching chunk of 64 bits, isn't that tiny, current SSE works 128bits vectors, sandy bridge is supposed to handles 256?
I find the part on the "sort of north bridge" really interesting.
But it's unclear to me if they speak about two chips on the same die (cpu + "north-bridge) or about an completely external chip.
The purpose of the device seems to accelerate communication between the cpu and the GPUs (seem design to connect with more than one device).
It's not clear if it works as a real north-bridge and manage main RAM acess?
Anyway super interesting, in fact I would say that it's the first relevant information in regard to nextgen systems we are provided with.
One, hand down
EDIT
How access the figure on the patent page?
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Well you can say the same kind of thing from the other side, for Intel's current CPU core and Larrabee :smile:
They can't emulate Xbox 360 next time due to the slowdown of Moore's law, so they have to have PPC cores somewhere. Probably the BTE, which is assigned to a workload manager, is a PPC core. So one of processing elements can have 3 BTEs + 1 VTE, while others have 1 BTE + 3 VTEs. Or, all of them may be PPC-compatible like Larrabee cores and AVX that are x86-compatible. Likewise, they have to have eDRAM in their GPU if memory bus technology available at the design date can't surpass it.
Why couldn't STI adopt this kind of new evolution of the many-core concept for CELL 2.0/3.0
It is true that ISA compatibility and binary level compatibility would go out of the window a bit, but in the RISC space that is kind of common practice.
Well, RISC has been declared dead before, and I think the ISA-leaping has had no small part to do with its travails. Now, that's neither here nor there mind you.
I agree that the architecture on a standalone basis is just fine for PS4 adoption, so it's not anything against the cache-based Cell we're talking about here, it's just that in the context on additional Cell funding I wonder whether this is part of the STI initiative or not, and if not what the ongoing STI funding is directed/limited to. Maybe it's just process shrinks as I mentioned.
I agree that the whole industry is otherwise headed in this direction, but it seems that IBM and partners have made enough progress on the software/tools front that for a lot of non-console purposes Cell is already being fairly abstracted in terms of programming complexity in the enterprise environment. For consoles, this work doesn't translate directly, yet at the same time after a generation of Cell (and the ensuing many-core paradigm arrival), I don't think that it will be viewed as the burden it is by some today.
I'm not saying that this chip isn't the larger evolution of Cell in the greater scheme... I'm just not certain though that what I'm looking at precludes the Cell itself (with ISA preservation) from continuing on. Obviously someone somewhere has some real insights into whether this is the future of Cell or not, so I just have to go find them and hassle them for info.
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