The Xbox 1's ESRAM

LoStranger

Newcomer
Hi there,

I'm aware the X1 employs 32MB ESRAM @ 102 GB/S I wanted to ask a few questions regarding this

1) Why the decision to go with ESRAM instead of GDDR5 particularly considering the fact the Xbox 360 used GDDR3 Unified memory

2) What benefits does having 8GB DDR3 + 32 MB of ESRAM have over the PS4'S 8GB GDDR5
 
Both your questions are seemingly answered with 'cost'. MS's solution should be cheaper and scale better, although there's debate on how much so (what is going to happen to DDR3 and HDDR5 prices over the coming years?). Also, Sony's choice to go with 8Gbs GDDR5 was unexpected and very costly - the design decision was more realistically 8 GBs DDR3 + ESRAM, or 4 GBs GDDR5, and MS wanted the RAM capacity. MS's solution does also gain lower latency for the GPU, but how much value this brings to the console is unknown at this point.
 
Why the decision to go with ESRAM instead of GDDR5 particularly considering the fact the Xbox 360 used GDDR3 Unified memory
Xbox 360 had a fast 10MB EDRAM chip connected to it's GPU. It was not purely a GDDR3 unified memory architecture. EDRAM allowed it to exceed PS3 in graphics memory bandwidth, and that often lead to better image quality and/or frame rate (in cross platform games).
 
But of course xenon was a much better GPU than the nvidia chip in ps3 so its not really a straight comparison
 
Lower latency vs brute force bandwidth/higher cost in the long term.

The microarchitecture and layout of the APU in MS case is more complex too, or at least that is what people suppose. They have to integrate the ESRAM memory in the same silicon space that the CPU, CU,s and so. That´s why appeared the (now almost completely discarded) rumour of MS having problems with the production ratios of the new APU.

Other difference is how the OS will handle the different approach in both architectures. It seems probable that scheduling and deploying variables in XBO will need more thinking, because of the two memory pools and differente buses available. Programming in PS4 will be simpler, but obviously not easy.

It´s not known how "deep" and "obscured" is the underlying hardware, how the OS API lets you program and see what is behind their interfaces. Again, it "seems" if we think in past generation mode that Sony is more prone to let the programmers do their thing "going under". That could be counterproductive in the long term because of portability of code and deploying of games in other platforms. To my taste one of the strongest points in MS proposal is the ability to "migrate" applications from XBO to future devices (with better performance capabilities) just because XBO is a virtualized system and it used HyperV.

As far as the gaming OS provided by XBO and its interface with HyperV could be migrated to other architecture able to "emulate" the actual XBO behaviour (the different buses, the different memory pools, and so on) MS could have the ability to upgrade the underlying hardware with no "technical" penalty in the use of your software. If the publishers will let you "use" that software in other hardware, even if it is totally capable of doing it from a technical perspective, who knows.

My vision is that Sony has chosen a simpler architecture and at the end has benefited from the upgrade in GDDR5 amount of memory onboard.

The last thing to evaluate is it´s better performer a low latency-double pool architecture, even with less bandwidth, lower peak performance, and (supposely) less memory -and maybe cpu time- reserved for pure gaming operations, or a high latency architecture, with more memory and with more sustained bandwitdh and with more flops available.
 
Hi there,

I'm aware the X1 employs 32MB ESRAM @ 102 GB/S I wanted to ask a few questions regarding this

1) Why the decision to go with ESRAM instead of GDDR5 particularly considering the fact the Xbox 360 used GDDR3 Unified memory

2) What benefits does having 8GB DDR3 + 32 MB of ESRAM have over the PS4'S 8GB GDDR5

The general consensus is that Microsoft decided early on (as early as 2010) that it would need 8GB of RAM to meet their requirements of the dual OS setup, giving 5GB to games and 3GB to Apps. 8GB of GDDR5 at that point was a strong uncertainty, and Sony at that time was still looking at using even just 2GB of GDDR5.

8GB of GDDR5 became a realistic possibility only very late last year - by the time Sony announced they would go for this in their final spec, most people, including several developers with devkits, were taken by surprise, because many didn't think it would even be an option.

There may have been other advantages for Microsoft as well - they had experience with using scratchpad memory for this purpose, and we don't know how effective it can be (several discussions have already taken place on this board suggesting what real-life advantages it can have). And it may have made backward compatibility a little easier as well (though considering how different the 360's setup was from the Xbox One's, probably not easy enough, also witnessing that backward compat. seems to be off the cards)

We're still not sure how well the performance ends up being, and if Sony wouldn't have been able to get 8GB of GDDR5 but would have to have stuck with 4GB, then Microsoft would have been in a very strong position today, so it's more that Sony's gamble payed off than that Microsoft's didn't, because basically Microsoft chose not to gamble in the first place.
 
Another interesting question is for what the ESRAM could be used in XBO architecture (including OS).

Scratch pad, high level cache, etc. Who owns it, how their space is accesible, is the programmer who decides what to put there, it is obscured, etc.

And, in the other hand, a big question is how will be software coding able to alleviate the problems of high latency GDDR5 when making pure CPU operations. Coding in CPU supposely will be easier now, because of the out of order abilities of the processor, but both CPU,s are the same, and in one case it access low latency memory and in the other high memory, high bandwidth pools.

The knowledge from PS3 coders dealing with cache missess (and trying to avoid them, constructing code and data structures that are efficient and not prone to frequent trips out of the cache) will be crucial -I suppose- to obtain really good efficiency from PS4.

That is, problem with PS4 maybe will be to obtain high sustained performance, and in XBO pure peak performance (if the Data move engines and the rest of the unkown hardware is up to the task of making the data flow smoothly between the different parts of the system). The worst case scenario in PS4 could be CU,s (or cpu cores) being idle waiting the arrival of data, in XBO simply not enough flops to sustain performance.
 
I don't know if cost was the main factor.
DDR3 was a safe bet to make a console with 8GB RAM, GDDR5 wasn't.
32MB eSRAM is but a performance complement.

Sony took a gamble with GDDR5 and could have been the next-gen console with half the RAM. They were lucky.
 
I recall the Shin'en (Nano Assault Neo) sayng for Wii U that the biggest bottleneck in modern gfx systems is memory latency, so the edram/sram heavy design of Wii u gpu is quite good for real world performance and flexibility.

I guess that XBO "took a hint" from that design and improved as much as it could, hence the sram.
 
Both your questions are seemingly answered with 'cost'. MS's solution should be cheaper and scale better, although there's debate on how much so (what is going to happen to DDR3 and HDDR5 prices over the coming years?). Also, Sony's choice to go with 8Gbs GDDR5 was unexpected and very costly - the design decision was more realistically 8 GBs DDR3 + ESRAM, or 4 GBs GDDR5, and MS wanted the RAM capacity. MS's solution does also gain lower latency for the GPU, but how much value this brings to the console is unknown at this point.

But isn't easier and cheaper to use edram?
 
SRAM is pretty standard for fabrication, the only downside is size per bit. DRAM requires deep trench capacitors and process compatibility with the logic, so there are extra steps and time involved for integration into the die. R&D for eDRAM typically lags standard processes, and it's not a ubiquitous offering at various foundries. (What if the DRAM portion turns out ok, and then the logic side poops out during fabrication? Wasted time and effort - even crappier yields ;))

edit: On a side note, the nature of capacitors can complicate design when it comes to thermal tolerance & performance.


An off-die chip is certainly easier, but there are implications to such a design down the road where die size reduction and integration are important factors to cost i.e. how long will they be fabbing a separate chip, how will that integrate, who has the ability to fab at a smaller node, how much will it cost at a particular fab? It might be somewhat indicative how long it has taken for the 360 eDRAM to be integrated (or why they even skipped it at 45nm).
 
An off-die chip is certainly easier, but there are implications to such a design down the road where die size reduction and integration are important factors to cost i.e. how long will they be fabbing a separate chip, how will that integrate, who has the ability to fab at a smaller node, how much will it cost at a particular fab? It might be somewhat indicative how long it has taken for the 360 eDRAM to be integrated (or why they even skipped it at 45nm).
Not that I question your knowledge but I would be in fact wary at such a claim.
Like when we used to talk about the bus size and their relative costs, I'm not sure that it is safe to assume much without proper evidences. For example Nvidia just shipped the GTx 760 which comes with a 256bit bus and sell for significantly less than its predecessor the 660Ti with a 192 bit bus. Nvidia doesn't have to consider future shrinks but still wrt prices it is a hint to me that the premium for a 256 bit bus is really low.


Wrt the eDRAM in the 360 it could be that MSFT is just fine with the (eDRAM) chip (and its power characteristic ) at the node they are currently using. We do not know.

When I look at the size of durango SoC I really wonder if MSFT went with eSRAM because they though it was better or simply because they had no choice.
I mean it is unclear if AMD could have done something akin to CrystalWell or even considered doing it (I hope they will react to Intel move and "copy" it). Intel acknowledged that they did no really need more than 32MB (though I guess they will find use for the others 96MB I would be surprised if they don't), looking at the WiiU producing 32MB of external cache should not result in a crazy big chip with the matching costs.
Now Intel cache hit rates are awesome may be CW would not serve AMD chip as successfully.

Either way on chip scratchpad provides significant performances improvements (outside of bandwidth). So far we can only guess.

My personal bet is that MSFT engineers might be looking CW with envy (and so might be Sony or I would guess lot of people in the industry).
 
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Not that I question your knowledge but I would be in fact wary at such a claim.
Like when we used to talk about the bus size and their relative costs, I'm not sure that it is safe to assume much without proper evidences. For example Nvidia just shipped the GTx 760 which comes with a 256bit bus and sell for significantly less than its predecessor the 660Ti with a 192 bit bus. Nvidia doesn't have to consider future shrinks but still wrt prices it is a hint to me that the premium for a 256 bit bus is really low.


Wrt the eDRAM in the 360 it could be that MSFT is just fine with the (eDRAM) chip (and its power characteristic ) at the node they are currently using. We do not know.

When I look at the size of durango SoC I really wonder if MSFT went with eSRAM because they though it was better or simply because they had no choice.
I mean it is unclear if AMD could have done something akin to Crystal Web or considered doing it I hope they will react to Intel move and "copy" it). Intel acknowledged that they did no really need more than 32MB (though I guess they will find use for the others (96MB I would be surprised if they don't)), looking at the WiiU producing 32MB of external cache should not result in a crazy big chip with the matching costs.
Now Intel cache hit rates are awesome may be CW would not serve AMD chip has successfully.

Either way on chip scratchpad provides significant performances improvements (outside of bandwidth). So far we can only guess.

My personal bet is that MSFT engineers might be looking CW with envy.

its Crystalwell!!!!:mad:
 
Like when we used to talk about the bus size and their relative costs, I'm not sure that it is safe to assume much without proper evidences. For example Nvidia just shipped the GTx 760 which comes with a 256bit bus and sell for significantly less than its predecessor the 660Ti with a 192 bit bus.
Both sell for much more than what would be budgeted for a console component, so the extra cash absorbs some of the premium.

Nvidia doesn't have to consider future shrinks but still wrt prices it is a hint to me that the premium for a 256 bit bus is really low.
Making an off-chip memory pool would mean Durango would have a 256 DDR3 bus, plus something equivalent to the 1024-bit on-die bus the eSRAM uses.

The bus could be wide and modestly clocked, or narrow and fast, which Crystalwell seems to be doing.
The wide method means the chip is going to have its perimeter dominated by the DDR3 and daughter die interface. The irony would be that the lack of an on-die eSRAM bloating the chip might mean more work is needed to provide the necessary pad space to the daughter die.
The narrower and fast interface would work if you have expertise in fast and custom interfaces and want to expend the effort for a custom high-speed interface, but thats several ifs that don't seem to fit here.

Wrt the eDRAM in the 360 it could be that MSFT is just fine with the (eDRAM) chip (and its power characteristic ) at the node they are currently using. We do not know.
What were they going to shrink it to?

When I look at the size of durango SoC I really wonder if MSFT went with eSRAM because they though it was better or simply because they had no choice.
I think there was a limited pool of options they could have drawn from.

I mean it is unclear if AMD could have done something akin to Crystal Web or considered doing it I hope they will react to Intel move and "copy" it).
Copying Crystalwell means having a variant of Intel's high-performance 22nm process for the eDRAM, the resources of Intel for designing the scheme, the expertise to make it somewhat affordable (if too expensive for a console), and the price flexibility to charge enough for novel product.

AMD (anybody not Intel?) has none of these.
 
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