ST-Ericsson Nova A9600: dual-core ARM A15, PowerVR Series 6

This is definitely big news. A little while back, ST-E had to turn to STM for help in getting their new products to market, and this was apparently the back up plan STM was forced to take when ST-E's ambitious fab plans couldn't be properly executed/funded.

I don't believe Samsung's 32 and especially 28nm nodes match up quite to the target ST-E was shooting for -- planning to enable very high clocks, -- so I wouldn't be surprised to see somewhat more conservative specs on ST-E's new chips now when they do finally launch.

Still, it'll be great to get a strong competitor to Qualcomm's integrated solutions with the new NovaThors and also, as far as standalone app processors go, the formidable A9600. Hopefully, ST-E can thrive through this transition.
 
I thought of something entirely different while reading it. Now I don't know if and how many foundry resources has Samsung open at the moment, but if those shouldn't be large enough I'd take that newsblurb to quite far fetched spin and think that Apple might contract another foundry after all.

http://www.imgtec.com/News/Release/index.asp?NewsID=684

Just a coincidence? Probably yes. I just can't help thinking a bit further with the obvious risk of being completely wrong.

If there should be any merit to it I'd expect quite a few things to change in the foundry landscape after all and different IHVs moving parts of their manufacturing needs or their entire crop around to other foundries.

It might be completely unrelated to the topic but I frankly never understood why ST Micro's foundry concentrates for years now only on antiquated processes.
 
Dedicating resources to ST-E while Apple's capacity needs are still growing very well might suggest that Apple is preparing to shift some of that production away from Samsung in the fairly near term.
 
Dedicating resources to ST-E while Apple's capacity needs are still growing very well might suggest that Apple is preparing to shift some of that production away from Samsung in the fairly near term.

Could be. However the xbitlabs newsblurb doesn't mention or imply that ST Micro will have any sort of priority like Apple currently has for manufacturing at Samsung.
 
Samsung is announcing the "new" Galaxy S III Mini and reports claim it has a NovaThor U8420.

Does anyone know what this actually is? Is it the same silicon as the U8500, a downclocked version of the L8540 or something entirely different?
The SGX544 from the L8540 would make it really interesting, but the Mali 400MP1 from the U8500 would make it really boring.

Nonetheless, according to the leaked picture the model looks really boring, it doesn't look like a small Galaxy S III at all, it's more like what a Galaxy Ace 3 would look like.
M8dLx.jpg


Unless this "Mini" comes really cheap, I think Motorola's RAZR M/i is a much better option for the same size.
 
http://www.linleygroup.com/newsletters/newsletter_detail.php?num=4865

But Mali is in a position to gain share by way of smartphone application processors in the recent Samsung Exynos 4212 and 4412 and ST-Ericsson NovaThor A9500 and U8520 processors.
http://www.stericsson.com/press/ST-Ericsson_Pressbackgrounder_Smartphones.pdf

....ST-Ericsson’s powerful NovaThor™ U8500, U8520 and L8540 ModAp platforms with integrated application processors, modems and connectivity. In fact, the NovaThor U8500 platform was selected by leading manufacturers such as Samsung, Sony Mobile Communications and Motorola, to power some of their 2012 smartphones.
***edit: I'm not sure but considering the rather high frequencies of the SGX544s in the 8540 and 9540 the SoCs might be manufactured under Samsung's 28nm.

******2nd edit: 28nm it is: http://www.anandtech.com/show/5598/stericssons-novathor-l8540-28nm-cortex-a9-soc-with-integrated-lte

DSC_5486_575px.JPG
 
So it's not U8420 bur rather U8520, and it seems to be a direct shrink of the U8500?

Why didn't they just use their own Exynos 4212? Because of the integrated baseband?
 
So it's not U8420 bur rather U8520, and it seems to be a direct shrink of the U8500?

Why didn't they just use their own Exynos 4212? Because of the integrated baseband?

Probably because of the baseband. Samsung never shied away from buying SoCs from other manufacturers if it should have a requirement their own SoCs don't include.

tangey,

I think but am not sure that the CPU cores in the SIII mini are clocked at 1GHz.
 
Probably because of the baseband. Samsung never shied away from buying SoCs from other manufacturers if it should have a requirement their own SoCs don't include.

tangey,

I think but am not sure that the CPU cores in the SIII mini are clocked at 1GHz.

Oh I have no idea ( or much of an interest) as to the clock speed in the phone, but it looks like the soc is spec-ed up to 1.2ghz
 
Well "up to" frequency is a common case for most if not all SoC specifications.
 
I don't think it deserves a new thread (yet):

http://www.xbitlabs.com/news/mobile...ilor_PowerVR_Graphics_Cores_to_Foundries.html

http://www.imgtec.com/News/Release/index.asp?NewsID=699

To help its partners, Imagination is already working with leading silicon foundries to implement high performance mobile GPU-based systems delivering unheard-of levels of memory bandwidth, using the latest PowerVR Series6 GPUs combined with wide I/O memory and advanced 3DIC assembly and process technologies. Imagination is also working with foundries and EDA vendors to ensure that licensees of all of Imagination’s IP (intellectual property) cores can benefit from well-defined tool flows and optimized libraries to achieve the most aggressive speed, area and power consumption targets.

Hmmmm....
 
That is a pretty vague statement regarding memory bandwidth. And why would they need "unheard of" levels of memory bandwidth when TBDR GPU's are supposed to require less memory bandwidth vs. other GPU's? :)

On a side note, it's interesting (although not unexpected given the source and given the marketing push behind the Series 6 architecture) to see that he defines GPU horsepower as GFLOP throughput. That is a bit misleading IMHO. GPU's used for gaming are almost never compared on a GFLOP/w or GFLOP/mm^2 basis, because this metric often doesn't correlate well with real world gaming performance. On the other hand, this metric is useful for high performance computing, but even then the metric would only be useful when looking at real world achievable and measureable GFLOP throughput rather than maximum theoretical GFLOP throughput.
 
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That is a pretty vague statement regarding memory bandwidth. And why would they need "unheard of" levels of memory bandwidth when TBDR GPU's are supposed to require less memory bandwidth vs. other GPU's? :)

Just because an architecture needs less bandwidth overall than other architectures, it shouldn't mean that when performance rises by a large degree that bandwidth requirements aren't also rising.

On a side note, it's interesting (although not unexpected given the source and given the marketing push behind the Series 6 architecture) to see that he defines GPU horsepower as GFLOP throughput. That is a bit misleading IMHO. GPU's used for gaming are almost never compared on a GFLOP/w or GFLOP/mm^2 basis, because this metric often doesn't correlate well with real world gaming performance.
Will that generation of GPUs be used ONLY for gaming? When those GPUs will launch we'll be able to compare them with other next generation GPUs and we'll see how perf/mm2 and/or perf/W looks like in real time achievable fillrates, geometry througput and others.

They've stated elsewhere that Rogue is by 5x times more efficient than the current generation.

On the other hand, this metric is useful for high performance computing, but even then the metric would only be useful when looking at real world achievable and measureable GFLOP throughput rather than maximum theoretical GFLOP throughput.
Since when do IHVs quote theoretical floating point throughput in achievable rates anyway? Other than that when the time comes we'll also see how Rogue fares with GPGPU.

From the so far announced next generation GPU IP cores ST Ericcson quoted for its future Novathor A9600 over 210 GFLOPs, over 5 GTexels fillrate (without overdraw) and over 350M Tris. ARM has quoted for its Mali T604 72 GFLOPs, 2 GTexels fillrate, both being 4 cluster designs.
 
Just because an architecture needs less bandwidth overall than other architectures, it shouldn't mean that when performance rises by a large degree that bandwidth requirements aren't also rising.

Obviously raw bandwidth requirements will increase over time. It is just ironic that ImgTech would promote "unheard of" levels of memory bandwidth rather than bandwidth-saving technologies of their TBDR architecture :)

Will that generation of GPUs be used ONLY for gaming?

As long as the gaming industry is thriving, then GPU's will be used primarily for gaming right? That said, do note that we are talking here about SoC's meant primarily for use in handheld devices (ie. smartphones, tablets). Gaming on these handheld devices could stress the GPU more than just about any other type of application available today. GPGPU and high performance computing is largely irrelevant on smartphones/tablets, especially those due out in the near future or next year.

They've stated elsewhere that Rogue is by 5x times more efficient than the current generation.

I think you are reading too much into that marketing note. When they say 5x more efficient, I think they mean 5x more GFLOPS in one Series 6 (Rogue) "cluster" vs. one Series 5 "core". The word "cluster" is a very generic term.

Since when do IHVs quote theoretical floating point throughput in achievable rates anyway?

IHV's quote this for high performance computing products, not for consumer-focused gaming GPU's.

From the so far announced next generation GPU IP cores ST Ericcson quoted for its future Novathor A9600 over 210 GFLOPs, over 5 GTexels fillrate (without overdraw) and over 350M Tris. ARM has quoted for its Mali T604 72 GFLOPs, 2 GTexels fillrate, both being 4 cluster designs.

As noted above, the word "cluster" is a very generic term and could mean almost anything. By the way, weren't these NovaThor 9600 specs announced more than 1.5 years ago? This product may not even make it to market until middle to end of 2013.
 
Obviously raw bandwidth requirements will increase over time. It is just ironic that ImgTech would promote "unheard of" levels of memory bandwidth rather than bandwidth-saving technologies of their TBDR architecture :)
There's no such thing as "enough" bandwidth. Ironically all so far SoC hw units share the very same bandwidth, meaning it's obviously not just for the benefit of the GPU.

As long as the gaming industry is thriving, then GPU's will be used primarily for gaming right? That said, do note that we are talking here about SoC's meant primarily for use in handheld devices (ie. smartphones, tablets). Gaming on these handheld devices could stress the GPU more than just about any other type of application available today. GPGPU and high performance computing is largely irrelevant on smartphones/tablets, especially those due out in the near future or next year.

Primarily in what sense? Would you suggest that GPU blocks keep getting larger as time goes by in small form factor SoCs to sit around completely idle most of the time and just get used for 3D and nothing else? How relevant or not GPGPU will be for the small form factor market remains to be seen. Just because several players in the field don't have any GPGPU capabilities in their SFF GPUs yet, it shouldn't mean that they're not about to move into that direction or that we won't see anything in that direction. Image processing is already used in some cases.

I think you are reading too much into that marketing note. When they say 5x more efficient, I think they mean 5x more GFLOPS in one Series 6 (Rogue) "cluster" vs. one Series 5 "core". The word "cluster" is a very generic term.

No it's 20x times more FLOPs for comparable target markets according to them. Rogue is at minimum DX10.1 while Series5XT is depending on core either DX9.0 or DX9.0L3. SGX545 is DX10.1; it'll get tricky but it's not too hard to find out where that difference comes from.

IHV's quote this for high performance computing products, not for consumer-focused gaming GPU's.

Feel free to let IMG"s partners know what they SHOULD use them for according to your opinion.

As noted above, the word "cluster" is a very generic term and could mean almost anything. By the way, weren't these NovaThor 9600 specs announced more than 1.5 years ago? This product may not even make it to market until middle to end of 2013.

So do the majority of other next generation GPUs. What's your point again?
 
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I don't think it means IMG is going to deliver unheard levels bandwidth. This quote was phrased badly (intentionally perhaps?). It just means they are working on chips that are built to USE unheard levels of bandwidth.

EDIT: edit for clarity

That's exactly where I pointed at in the first paragraph of my post right above yours:

There's no such thing as "enough" bandwidth. Ironically all so far SoC hw units share the very same bandwidth, meaning it's obviously not just for the benefit of the GPU.

Further:

http://withimagination.imgtec.com/i...meta-cpu-advanced-simultaneous-multithreading

For most platforms, system latency is quickly becoming the bottleneck. The traditional CPU centric approach was to rely on dedicated memory with fixed predictable access times (tightly coupled memory, for example) and hope Out of Order (OoO) execution and branch prediction would mask latency issues. This proved to be a tolerable “good enough” solution as long as the cost and performance metrics were reasonable.

Therefore it becomes clear that, as embedded technologies move forward, common solutions such as increasing clock frequencies, adding additional caches or increasing the number of CPU cores on a chip will just make matters more complicated rather than deliver leaps in performance gain. As processors try to take control of the system resources, the bus fabric becomes a convoluted matrix and large latencies will unequivocally start to appear. These will in turn corrode the overall system performance and waste power, therefore going to a dual-core CPU might only give a 30% to 70% improvement.

Obviously not directly related but SoCs will need healthy bandwidth increases amongst other things. Besides the original quote I used from the PR in question mentions clearly wide I/O memory amongst others.
 
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