AMD RV770 refresh -> RV790

What's the thinking around any improvements over RV730? Some guys over at XS are making a compelling argument about a straight 40nm shrink not being large enough to support a 128-bit GDDR5 bus.
 
If anything I hope it inherits RV730's ALU:TEX ratio.


I don't think ATI would want a dumb shrink anyway- when you can kill 2 birds (RV770 LE and RV730XT) with one stone, why not?

The differences would only be in clock speeds and memory type.
 
Hardware-Infos - AMD RV770 has 900 stream processors

AMD RV770 has 900 stream processors
The current picture shows the SIMD-cores of the RV770. The row by row to ten numbered figures correspond to the SIMD-units of AMD-GPU. The column by column to nine numbered figures the shader clusters per SIMD, in which two shader units are located. Consequently, it has 18 shader cores per SIMD-unit.
The product of both numbers is the count of vec5-units, so 180 (10*18). Because every vec5-unit – as the name says – has five different scalar units (RGBA, red green, blue, alpha stock, special function) you can speak of 900 stream processors.

rv770_900sps.jpg


What is this guy on about?
 
It seems unlikely. 18 vec5 units per SIMD, then how do they use their quad based rasterizer? 16vec5 per SIMD makes sense to me atleast, ie 2x2 pairs.
 
You can't see this really in this picture, but the number 9 designated area, while looking quite similarly, is not identical to the number 1-8 areas - IIRC it's not even the same size. Pretty sure there was some picture floating around which explained the functional units, I think that "9" area was belonging to tmu or maybe array control logic.
 
You can't see this really in this picture, but the number 9 designated area, while looking quite similarly, is not identical to the number 1-8 areas - IIRC it's not even the same size. Pretty sure there was some picture floating around which explained the functional units, I think that "9" area was belonging to tmu or maybe array control logic.
It's pretty similar, and I woudn't expect it to be exactly the same because there needs to be some routing logic to enable the redundant Vec5 unit to replace one of the others if necessary.

Remember that only half of the #9 column needs to be redundancy. There are 16 vec5 units per SIMD, so maybe only the bottom half is a 17th redundant unit. The upper half could be any number of things.
 
That should come pretty close to a 4850 in performance while being less than half the die size. And if vr-zone is right about the sub $100 pricing that will be one sweet entry level card.
 
Clock it at 800Mhz, price it at $100 and you get a souped-up halo effect that not even a new highend can match. Sub 100USD seems... unlikely. At least not for this specific part.

The only big problem would be model naming. 4700 would be too unfair for this chip given the expected performance, 4840 would be good, but kind of saturating the whole 4800 series :LOL:
 
Not really the RV770 refresh, but RV740 looks a bit more interesting now with these specs... http://vr-zone.com/articles/ati-rv740--a-40nm-rv770-in-disguise/6334.html?doc=6334
They're wrong on the rop count for rv730, and I suspect thus for rv740 as well (not that it would be impossible to have one rop cluster per 32bit memory channel instead of per 64bit). Since this is supposed to be a quite cheap part, I wouldn't really expect high clocks so with these specs performance probably closer to a hd4830 rather than hd4850.
 
Speculation: Refresh of R700 "R700b possible"

I was thinking when we could expect from ATI something like this? :)

atir700bcu2.jpg
 
I was thinking when we could expect from ATI something like this? :)

atir700bcu2.jpg

Or 2 packages with each 2xRV740, which is estimated to be ~100mm² while containing 32TMUs, 640SPs, 16 ROPs, 128-Bit MC,.

But this would be the the X2, with a total of 2560SPs/128TMUs, 64ROPs @ >700MHz, 512-Bit@>1000MHz GDDR5 with normal Crossfire between this 2 packages.

On the other hand there would be HD4950/70 with only one MCM with 2xRV740, which uses a new hidden technology with a good scaling around 80-90%, even frame output and shared memory.

Finally AMD has only to produce 2 GPUs:
- RV740@100mm² for Mainstream up to Enthusiast
- RV720@50mm² for Low-End and possible chipset usage

And in quarter 4 they are going to 150mm², while adding D3D11 and some more processing power and shrinking it down in 2010 in 32nm while adding even more power.

Just imagination, but it would be nice if AMD would be able to do such a strategy...
 
They're wrong on the rop count for rv730, and I suspect thus for rv740 as well (not that it would be impossible to have one rop cluster per 32bit memory channel instead of per 64bit). Since this is supposed to be a quite cheap part, I wouldn't really expect high clocks so with these specs performance probably closer to a hd4830 rather than hd4850.

They corrected that and from my point of view "their" specs seem very logical.
RV730 is 128bit/8rops - 320sps/32tmus and on 55nm ~150mm²

Now, IF
RV740 is 128bit/16rops - 640sps/32tmus and on 40nm ~100mm²+
w/ 1GHz GDDR5 and 800MHz engine clk RV740 would beat the HD4850 w/ less than 1/2 the die-size and much lower power draw. This thing could replace HD4650, HD4670, HD4810, HD4830 and HD4850 and would be much more efficient.

Remember when i said rv870 isnt little dragon?
 
The smallest 128bit GPU I know is RV515 with 100mm2... RV740 will support GDDR5 which require a bit more die-space for additional pads. How could RV740 be 100mm2 large, if anything under 100mm2 is pad limited even for 128bit GDDR3 interface?
 
The smallest 128bit GPU I know is RV515 with 100mm2... RV740 will support GDDR5 which require a bit more die-space for additional pads. How could RV740 be 100mm2 large, if anything under 100mm2 is pad limited even for 128bit GDDR3 interface?
If you read Shintais infos about pincounts, it should not be such a problem:
http://www.xtremesystems.org/forums/showthread.php?t=211560&page=3

When was the last time you checked CFX 4-chip scaling?
Read again. Im thinking of a new technology, based on a MCM, where of these two are operating in the not so bad scaling 2-Way-AFR.
 
If you read Shintais infos about pincounts, it should not be such a problem:
http://www.xtremesystems.org/forums/showthread.php?t=211560&page=3
Not sure this is really correct. The dies of those chips not necessarily have the same amount of connections (pretty sure they are different, in fact) as the whole packaged chips has pins.
Isn't the pad limit actually a function of outline rather than area (hence maybe the reason why atom is so rectangular)?
Also, I thought the number of pads you can fit on a chip also goes up - though not as fast as transistor size goes down.
 
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