TSMC wafer pricing

[DegustatoR]

TSMC's System-on-Wafer Platform Goes 3D: CoW-SoW Stacks Up the Chips

www.anandtech.com

 

[DegustatoR]

TSMC Readies 8x Reticle Super Carrier Interposer For Next-Gen Chips Twice as Large As Today's

www.anandtech.com

 

[del42sa]

TSMC Readies 8x Reticle Super Carrier Interposer For Next-Gen Chips Twice as Large As Today's

www.anandtech.com

bigger is always better

 

[Erinyes]

It does feel a bit like 16nm vs 20nm… In many ways, A16 feels like N2P+backside and not much else, just like 16nm was mostly just FinFET. It’s quite disappointing N2P lost backside power delivery, that must be a very welcome surprise for Intel. I wonder how A16 compares to the *original* N2P with backside power delivery…

The density scaling is sufficiently bad that it seems to vindicate Intel’s High-NA strategy to some extent as necessary for density, although TSMC’s argument will be that doesn’t necessarily make the transistors/$ any better or significantly improve perf/power.

Still, I expect TSMC to be extremely competitive with Intel in practice for N2(non-P) vs 18A and beyond that, process nodes aren’t just about high level features and buzzwords, and TSMC has consistently delivered where it matters.

A16 is almost certainly just N2+ BSPD. I don't think it is disappointing as such given that the timing of A16 and N2P are similar. It seems to be a divergence in cost models for different applications. From TSMC's press release - "A16 ideal for HPC products with complex signal routes and dense power delivery networks", and given TSMC has chosen the most complex application of BSPD, it would certainly be a significant increase in wafer cost. TSMC has a diverse base of customers and has to cater to all possible applications/products. For those who do not need the absolute benefits of A16, N2P would be a cheaper alternative (and IP compatible with N2). Whereas for HPC, A16's benefits would probably outweigh the additional costs. Given the low number of external customers, Intel would mostly have their own internal CPU/GPU tiles on 18A, which would benefit from BSPD and hence makes sense to have on 18A. Even then I believe it is optional and can be dropped if not required.

TSMC is exploring high NA for A14 or whatever their next node is (which I expect to go to HVM in 2H'27) but they have a much higher volume than Intel and would need a significantly higher number of HNA machines. ASML would need to have the capacity to supply. Perhaps we could see them play it safe and go for High NA for A14P instead.

 

[pharma]

May 6, 2024

TSMC's Entire CoWoS Supply Reportedly Reserved By NVIDIA & AMD Until 2025

AMD & NVIDIA have reportedly reserved TSMC's entire CoWoS production for the next two years as both firms aggressively compete in the AI race.

wccftech.com

Taiwan Economic Daily reports that TSMC has seen its packaging supply wholly booked by AMD and NVIDIA. The CoWoS technology is being used for the development of NVIDIA's Hopper and the latest Blackwell GPUs while AMD is also leveraging it for its own MI300 accelerators.

The Taiwanese semiconductor giant plans to massively scale its production facilities in response to such huge demand. The company looks to achieve around 45,000 to 55,000 units of output by the end of this year, marking a vast YoY increase. This not only shows how big of a demand the industry is witnessing but also that TSMC has shown resilience and has gone to all extents to satisfy clientele demand.

 

[trinibwoy]

What’s a single unit of CoWoS? One wafer’s worth of stacks?

 

[LordEC911]

What’s a single unit of CoWoS? One wafer’s worth of stacks?

I was wondering the same and was flipping back and forth between wafers and lots.
They don't specify a time period though, so...
I would have to assume it is per month and a unit is a wafer.

Edit- I was initially thinking lots because I misread the article and thought they were talking about ~50k units per year.
Edit- I guess it helps if you go to the source and ignore the shoddy journalism.

In response to huge customer demand, TSMC is actively expanding its advanced packaging production capacity. Industry estimates indicate that TSMC's CoWoS monthly production capacity will reach 45,000 to 50,000 pieces by the end of this year, a multiple increase from 15,000 pieces in 2023. By the end of 2025, CoWoS's monthly CoWoS production capacity will reach a new peak of 50,000 pieces.

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