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#1 |
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Junior Member
Join Date: May 2003
Location: Mtl
Posts: 80
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Hey,
I just noticed the interview with NVidia's CEO stopping by clubic.com's. Summaries of what I found interesting (translated from french, so the usual disclaimer applies): -3DMark03 cheats: JHH acks them as optimizations (big news, it's really not a bug). All optimizations will now have to follow a QA process: > image must be valid > optimization must be effective for more than a single benchmark > optimization must not contain static/precalc data -Xbox2 is not out of the picture and they still have a good relationship with MS -the new product cycle will stay at 6 months, the current slowdown came from the effort to migrate to 0.13 but now that it's done.. -no nForce for Intel planned anytime soon Anything worth discussing? |
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#2 |
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Professional Malcontent
Join Date: Feb 2002
Location: HTTP 404
Posts: 2,855
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Poo on the nforce thing.
Me like choice.
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Sigmatel, R.I.P. Me[X-------:--------]You |
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#3 |
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Senior Member
Join Date: Jul 2002
Location: BelleVue Sanatorium, Billary, NY. Patient privileges: Internet access
Posts: 2,694
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nVidia said a long time ago it wasn't pursuing an Intel bus license for chipset support because of licensing fees--I seem to recall $5 a pop mentioned somewhere but that may not be the case. At any rate, plenty of other companies are paying the licensing fees and there still seems to be room for competition with Intel for the P4 bus. So I'm wondering if nVidia sees the AMD chipset market as less competitive somehow and more open for them--which is strange considering VIA and that many of the other players also do AMD chipsets as well as Intel. Perhaps, they just want to avoid going head-to-head with Intel?
I have to say that my nf2-chipset mboard I've had since December '02--Chanitech 7njs--is excellent. I've had 0 compatability problems with an early R9700P I picked up about 90 days prior to buying the mboard, with AGp x8, fastwrite support--etc. Ditto the 9800P. It's been as good a motherboard as I've ever owned. It's supported an AXP 1800 Pally, and AXP 2000 + pally, an AXP 2000 + T-bred, and now an AXP Barton 2500 + without a single hitch, since December. All bios updates have gone without a hitch on the first try, etc. Right now I'm running the Barton at a cpu fsb of 190MHz @ 2.1GHz at default voltages and it's rock solid--and I'm certainly not running "premium" DDR, either. I like being able to lock the PCI and AGP buses at 33MHz regardless of cpu fsb settings, and I appreciate the enormous control the bios provides me over a number of critical features, like ram timings. A lot to like about this board. I don't use onboard sound, however--never liked the concept--and although the board offers serial RAID 0 support (Silicon Image, I think) I use a Promise Fast Track 2000TX PCI controller instead. But I am using the onboard IDE channels to support two other HD's and two CD/DVD and burners as well. Very solid product for thus far. USB support is fine for both Keyboard and mouse. Still, I wonder if nVidia isn't positioning itself to dominate the A64 chipset and board market when the A64 ships next month. It just has never seemed likely to me that the licensing fee was the primary reason nVidia steers clear of the P4 bus. |
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#4 |
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Gamerscore Wh...
Join Date: Jan 2002
Posts: 12,956
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I do find it odd tht in one moment they acknowledge that cycle times are going up, but then the mext moment say "the 6 month cycle is fine". Its also being said increasinly in the industry that the migration below 130nm is getting increasingly more difficult rather than easier.
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#5 | |
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Senior Member
Join Date: Feb 2002
Location: Luleå, Sweden
Posts: 1,775
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Quote:
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"Yeah, well, i'm gonna build my own theme park, with Black Jack, and hookers. In fact, forget the park" //Bender - Futurama - episode 2 |
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#6 | |
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Gamerscore Wh...
Join Date: Jan 2002
Posts: 12,956
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Quote:
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#7 | |
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Member
Join Date: May 2003
Location: UK
Posts: 481
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Quote:
EDIT: Which you've already mentionned. Nevermind. |
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#8 | |
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Retarded moron
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Isn't that a limitation of current machinery?
Probably like NASA... still using machines back from the 80's but kept updating small parts of it. Quote:
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I eat coffee. |
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#9 |
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Dangerously Mirthful
Join Date: Feb 2002
Location: Winfield, IN USA
Posts: 15,292
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Well it took a whole day to prove him wrong about Xbox2, how long before the rest gets disproved?
__________________
Elite Bastards - Adminish “Be polite, be professional, but have a plan to kill everybody you meet.” - General James N. Mattis |
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#10 | |
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Junior Member
Join Date: Sep 2002
Posts: 60
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Quote:
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#11 | |
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Senior Member
Join Date: Jul 2002
Location: BelleVue Sanatorium, Billary, NY. Patient privileges: Internet access
Posts: 2,694
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Quote:
But as far as comments on the process go for nVidia, JHH has about no credibility in my book. This is the same guy who said well over a year ago that nv30 was dependent on .13 microns--said that at a time long before nVidia apparently actually knew very much about existing .13 micron processes at the time. And to me, the idea that a gpu architecture would somehow be dependent on a specific manufacturing process which itself was still in the early stages of development--is well, just sort of nuts. I mean, it makes all kinds of assumptions about facts not yet in evidence. I could have understood his remarks a lot better had nv3x included a bunch of embedded cache--you need the transistors in that case which would predicate a requirement for a denser process. But such was not the case for nv30. Rather, I think the fp16/fp32 approach was needlessly complex--almost as if it was a bolt-on to the GF4--and even in the design stages nVidia had no confidence about the performance of fp32 in its chip. Of course, I could have it backwards and fp32 could be the bolt on... Which brings me to Prescott...I read a long time ago--pre Itanium-- comments by Intel people talking about one of the major problems the company foresaw going to .09 was current leakage. They talked about designing "sleep transistors" to combat it (shutting down portions of the cpu which weren't being used to cap the leakage that way), but according to the reports I've also read it doesn't seem as if this approach has panned out. So instead of cooler, faster cpus requiring less power it seems as if the smaller process cpus are only running faster while requiring more power and generating more heat. But of course much of that depends on the circuit design itself relative to the process. That's why I've always preferred AMD's design strategy to Intel's. Whereas Intel de-emphasizes architectural efficiency per clock in order to ramp up MHz, this makes them overly process-dependent in my view. AMD seems to achieve its per-clock efficiency goals architecturally and worry about process later. Neither approach is perfect of course but I prefer AMD's because it will mean they will run into the kinds of barriers Intel now faces with Prescott relative to .09 much later than Intel, and will have longer to overcome those problems before it becomes critical for them. Right now, it seems the only way Intel can buy parity with AMD is by keeping Xeon clocked 1GHz higher than Opteron, even if that's enough. This puts a lot of pressure on Intel, and apparently Intel feels that an .09 Prescott is a necessity if it is to remain competitive with AMD's .13 micron Opteron/A64. The two companies face different problems because their fundamentals relative to cpu design are so different. In a sense, it seems as if Intel's still locked into its traditional "freeze the architecture-ramp the MHz" philosophy. But I did read a blurb awhile back that nVidia had no plans to even toy with .09 in the near future, which I thought was credible, given the circumstances. Maybe JHH is hoping to slow the ATi train by reigniting the buzz of publicity about process (by talking up .09) which surrounded nv30 prior to shipment (when he talked about .13)...? Certainly, everybody knows .09 won't be a cakewalk, so I hope JHH isn't preparing to commit such a blunder again...If so, I can think of nothing apart from desperation that might explain it. |
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#12 | |
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Member
Join Date: Sep 2002
Posts: 559
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Quote:
-FUDie
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Ph.D. - Piled Higher and Deeper |
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#13 | |
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Trollipop
Join Date: May 2003
Location: Australia
Posts: 1,630
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Quote:
LOL good job there |
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#14 |
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Junior Member
Join Date: Jul 2003
Posts: 13
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The only way I see to clean up this mess is start cleaning house. All management at Nvidia from the top down need to be ousted. Starting with the President and head of PR. That is the only solution because they have shown their true colors and no one will ever trust these guys again. They have shown they are not worthy of the consumer or stock holders trust and until these guys are gone nothing will change.
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#15 | |
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Dangerously Mirthful
Join Date: Feb 2002
Location: Winfield, IN USA
Posts: 15,292
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Quote:
__________________
Elite Bastards - Adminish “Be polite, be professional, but have a plan to kill everybody you meet.” - General James N. Mattis |
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#16 |
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Regular
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Dont be naive, they are all alike ... it wouldnt matter. You hit em with a rolled up newspaper to keep them inline for a while and you move on.
If the QA process is really in place that would be a huge plus ... I doubt such a structured approach to optimizations exists at any of their competitors at the moment. |
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#17 |
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Senior Member
Join Date: Jul 2002
Location: BelleVue Sanatorium, Billary, NY. Patient privileges: Internet access
Posts: 2,694
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Hmmmm....Just checked JHH's biography sketch at www.nvidia.com and it seems he did a stint with AMD prior to founding nVidia in 1993. Probably explains his aversion to the P4 bus and his desire to support AMD--got some good contacts in the company, I'd bet.
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