[Acert93]

TSMC's 20nm won't have FINFET?

[AlStrong]

Originally Posted by Acert93

TSMC's 20nm won't have FINFET?

http://www.itproportal.com/2011/05/1...-process-size/

...reveals that it won't be available to its customers until the 14nm process size hits the mainstream.

P.S. Why am I always delivering bad news to you, Acert?

[Acert93]

You enjoy crushing my dreams?

[Bob]

Originally Posted by Arun

[(i.e. their 'scaling factor' is less than the actual transistor scaling).

Disclaimer: I don't know anything about those slides

That scaling fact has been true for a long time, even ignoring IO. Wires don't scale in the same way as transistors, and different kinds of transistors also don't scale the same. Standard cells don't all scale the same way, so depending on the mix of standard cells in two different designs, they would scale differently going from one process to another.

The newer processes also have more stringent P&R requirements. For example, some of the newer ones require that certain metal layers only have wires going in a single direction (horizontally or vertically, but not both). This reduces the overall density of transistors you can put on a die versus what it would be if that particular rule was not required, even if the individual transistors themselves would scale with that ideal factor (which they don't).

[Arun]

Originally Posted by Bob

That scaling fact has been true for a long time, even ignoring IO. Wires don't scale in the same way as transistors, and different kinds of transistors also don't scale the same. Standard cells don't all scale the same way, so depending on the mix of standard cells in two different designs, they would scale differently going from one process to another.

That's a good point, and while tools have been improving to exploit that fact, they can't get around the fundamental limitations of the process.

BTW, every new process node resulting in lower area utilisation does lead to an interesting problem where most semiconductor IP vendors quote their designs as pre-layout with 100% utilisation...

The newer processes also have more stringent P&R requirements. For example, some of the newer ones require that certain metal layers only have wires going in a single direction (horizontally or vertically, but not both). This reduces the overall density of transistors you can put on a die versus what it would be if that particular rule was not required, even if the individual transistors themselves would scale with that ideal factor (which they don't).

1D design rules are an interesting debate. GlobalFoundries initially claimed that Gate-First High-K was cheaper than Gate-Last and when they finally got problems on the implementation side, they suddenly started claiming it was actually higher density than Gate-Last despite the fact TSMC's lower density has nothing to do with Gate-Last and everything to do with very strict P&R requirements because they are using less aggressive litography for cost reasons (and also to make sure their customers don't do crazy cell designs that would result in horrible variability).

I certainly agree that logic scaling isn't anywhere near 50% and hasn't been for some time (although 28nm is likely worse than 40nm in that respect) but looking at Kepler's transistor density versus Fermi, I doubt it's that bad (even assuming it would have increased on the same process). Part of the reason for that is obviously that unlike in the DX7-DX8 and early DX9 era, there's quite a lot of SRAM on modern GPUs, and that has continued to scale very well (with some trade-offs in terms of performance or power).

You might be right that they're not including any I/O in there - while we do know what their wafer price ratio is from the other graph, it's impossible to tell what their yield estimates were, so there's a missing variable and we can only guess. Anyway it's all a bit academic at this point because 28nm still looks like a very good process from that graph (6Q between 55->40 and 40->55 crossover) and their real problem is with 20nm which makes sense given TSMC's 1.45x capital expenditure estimate.

On a barely related note, I'm very curious about how significant TSMC's COWOS (Chip-on-Wafer-on-Silicon) initiative will be for the GPU market and what kind of adoption we'll see...

[Alexko]

Originally Posted by Arun

I certainly agree that logic scaling isn't anywhere near 50% and hasn't been for some time (although 28nm is likely worse than 40nm in that respect) but looking at Kepler's transistor density versus Fermi, I doubt it's that bad (even assuming it would have increased on the same process).

Yes, Kepler vs. Fermi isn't a very good comparison because of hot-clocks. Tahiti vs. Cayman isn't ideal either, because of Tahiti's bigger memory bus. But I think Pitcairn vs. Barts makes sense.

Barts: 1700 Mtrans, 255mm², 6.67 Mtrans/mm²
Pitcairn: 2800 Mtrans, 212mm², 13.21 Mtrans/mm², or about 1.98 × 6.67 Mtrans/mm².

That's pretty damn close to perfect scaling.

[UniversalTruth]

TSMC 28nm capacity in large shortage

While yield rates of its 28nm process are slowly improving, TSMC is conservative about expanding 28nm foundry capacity in order to maintain gross margins, partly accounting for the capacity shortage, the sources said.

???

[itsmydamnation]

im assuming they just dont have Fab space lying around, so to transition more 28nm capacity they would have to reduce something else. I guess 28nm doesn't have the demand and/or the yields to reduce production of other nodes.

[pcchen]

TSMC can't meet the demand on 28nm, so I think if this report is accurate, the most likely explanation is that TSMC expects its yield to improve so there's no need to expand too quickly now.

[silent_guy]

FWIW, here's an unofficial statement gotten by John Cooley that ended up in my inbox:
http://www.deepchip.com/items/0500-09.html

[UniversalTruth]

How exactly do they improve yield? Isn't manufacturing capacity somehow related to improving yields, I mean a given number of different designs through the process, large enough samples to be taken in order to fix issues, such kind of stuff...

[AlStrong]

Trial and error with the doping/chemical concentrations? The lithography has a number of steps that could go wrong with improper timings. Oxide growth can be uneven across a wafer too but... *shrug*

[dkanter]

I think those slides were just people bitching about TSMC's prices. Over time, the prices will drop. It's nothing fundamental to 28nm or 20nm.

DK

[UniversalTruth]

TSMC eyeing advanced process chip orders from Apple

With orders placed by Qualcomm, Nvidia, Broadcom, TI and AMD, TSMC meets less than 70% of 28nm chip demand at present, the sources pointed out. While having tight supply of 28nm capacity, TSMC now hopes an early investment in 20nm technology will help the foundry engage in collaboration with potential clients such as Apple in advance and ensure enough capacity to meet demand, the sources indicated.

And more interesting stuff, just click it.

Taiwan Semiconductor Manufacturing Company's (TSMC) plans to ramp up 20nm production ahead of schedule have prompted industry sources to speculate that the foundry will be aggressively striving for CPU orders for future Apple devices.

Edit:

More 'news'

Graphics card shortages to see improvements in late May

[UniversalTruth]

TSMC remains confident in their 28nm manufacturing

[iwod]

I do hope TSMC will get their act together. I am pretty sure Apple wont mind paying a dollar or 2 for chip made elsewhere then Samsung. And just may be, TSMC will make a true Apple Design SoC instead of the current one which are more like take parts away and tweaked Design of Samsung SoC.

[silent_guy]

Originally Posted by iwod

I do hope TSMC will get their act together. I am pretty sure Apple wont mind paying a dollar or 2 for chip made elsewhere then Samsung.

I think they will care a lot about $2. But TSMC should be cheaper.

And just may be, TSMC will make a true Apple Design SoC instead of the current one which are more like take parts away and tweaked Design of Samsung SoC.

The chance of Apple using Samsung IP, other than, maybe the standard cell library, is close to 0.

[dagamer]

Originally Posted by iwod

I do hope TSMC will get their act together. I am pretty sure Apple wont mind paying a dollar or 2 for chip made elsewhere then Samsung. And just may be, TSMC will make a true Apple Design SoC instead of the current one which are more like take parts away and tweaked Design of Samsung SoC.

Large chunks of any SoC are pretty much other people's IP. The CPU, the GPU, the memory controller, etc... are all pretty much designed by someone else, just packaged together differently. It's like saying an Mac is better than a PC because of the hardware inside. It's all the same parts more or less!

The key is the "special sauce", the glue that binds those components together. Sometimes it's the most mundane stuff like a hinge that affects your perception of a brand far more than the highly specialized CPU built to incredible tolerances.

Lastly, while Apple would probably love to crush Samsung, they are the only reliable foundry that can scale production to meet Apples orders right now. TSMC is already reporting shortages, do you think they could handle another 40 million Apple orders right now? I don't think so.

[dkanter]

Originally Posted by dagamer

Large chunks of any SoC are pretty much other people's IP. The CPU, the GPU, the memory controller, etc... are all pretty much designed by someone else, just packaged together differently. It's like saying an Mac is better than a PC because of the hardware inside. It's all the same parts more or less!

The key is the "special sauce", the glue that binds those components together. Sometimes it's the most mundane stuff like a hinge that affects your perception of a brand far more than the highly specialized CPU built to incredible tolerances.

Lastly, while Apple would probably love to crush Samsung, they are the only reliable foundry that can scale production to meet Apples orders right now. TSMC is already reporting shortages, do you think they could handle another 40 million Apple orders right now? I don't think so.

It's not clear how much of the IP is Apple's. They are using an ImgTec GPU, but I don't know if future CPUs are custom designs or licensed cores (in the future).

Also, TSMC only has issues with 28nm. Most of Apple's SoCs are still 40nm. I'm not convinced that Samsung is really ahead of TSMC is any meaningful way. Sure, Apple does have 1-2 28nm SoCs, but I don't think they are for the really high volume products.

I think a more important point is that switching fabs takes a long time. You cannot simply take a project and move to another fab overnight. You'd probably still have 2-3 years of stuff in the pipeline targeting the old fab.

DK

[UniversalTruth]

TSMC Reports Third Quarter EPS of NT$1.90

Shipments of 28-nanometer process technology more than doubled during the quarter and accounted for 13% of total wafer revenues

[UniversalTruth]

Strong Demand Causes TSMC’s 28nm Output to Exceed Projection

Taipei, Dec. 3, 2012 (CENS)--Taiwan Semiconductor Manufacturing Co. (TSMC) cranked out 52,000 300mm wafers processed using 28nm process technology at its Fab 15 factory in central Taiwan in November 2012, surpassing planned 50,000 wafers, and the output is likely to reach 75,000-80,000 wafers in December, more than planned 68,000 wafers.

TSMC began volume production of 28nm chips in October, 2010, with initial output of around 1,000 wafers a month. Fab 15 is the foundry giant’s pivotal production site for 28nm chips, turning out over 10,000 wafers using the process in the second quarter this year. The monthly output of 52,000 wafers marked the unprecedented volume production speed at the company’s giga-size foundry factories.

...

TSMC will begin tooling the phase 4 and phase 5 production modules of Fab 15 sometime in December and put the two modules into volume production in the second quarter of 2013. Employees at the factory will increase to 2,400 in 2013 from current 1,800. This fab will take TSMC a total of NT$300 billion (US$10.3 billion) to complete in 2015.

TSMC is estimated to begin pilot production of chips at 20nm nodes in the second half of 2013 and volume production of the chips in 2014.

[A1xLLcqAgt0qc2RyMz0y]

Originally Posted by Tahir2

If it carries on going up as in the NVIDIA slides it means it isn't worth it being first anymore. Let others mature process and have longer cycles between refreshes and new architectures. This is something that has been happening but may become more pronounced as will higher prices and less availability..

This seems to be happening right now as both AMD and Nvidia have delayed their respective GPU updates until at least the 4th quarter 2013.

[jimbo75]

Has Nvidia admitted that or is it still just a rumour?

[Alexko]

Originally Posted by jimbo75

Has Nvidia admitted that or is it still just a rumour?

I was just thinking about that yesterday, I don't think NVIDIA has communicated anything about their graphics roadmap (beyond GK110) in a long time. There's this:



But it's old, and there hasn't been anything since. And it probably refers to production and not commercial release, since every architecture on this slide that was actually released was released a year later.

[A1xLLcqAgt0qc2RyMz0y]

Originally Posted by Alexko

I was just thinking about that yesterday, I don't think NVIDIA has communicated anything about their graphics roadmap (beyond GK110) in a long time. There's this:

But it's old, and there hasn't been anything since. And it probably refers to production and not commercial release, since every architecture on this slide that was actually released was released a year later.

That road map is outdated Maxwell is already shown to be in 2014 when the 20nm process becomes available.

http://wccftech.com/nvidia-roadmap-c...rives-1h-2013/