[MfA]

Why does Intel get so much smaller so much faster than anyone else with the same machinery? Their fabled discipline in factory layout etc. and experience in design for manufacturing no doubt helps, but I can't believe that's all it is at this moment any more. That explains months, not years.

I have the feeling Intel has locked in all the decent ways of doing computional lithography with use of pixelated transparent masks (which have some inherent advantages for diffractive optics) through patents. This seems to me the most important differentiator between Intel and everyone else. Everyone else seems to be fighting over scraps like source mask optimization. Which AFAICS is only really useful for highly regular directional patterns and not say CPU logic layers (flash manufacturers seem the only ones keeping up with Intel BTW).

Am I correct in this conclusion?

PS. damn, no title editing.

[rpg.314]

Originally Posted by MfA

Why does Intel get so much smaller so much faster than anyone else with the same machinery? Their fabled discipline in factory layout etc. and experience in design for manufacturing no doubt helps, but I can't believe that's all it is at this moment any more. That explains months, not years.

I have the feeling Intel has locked in all the decent ways of doing computional lithography with use of pixelated transparent masks (which have some inherent advantages for diffractive optics) through patents.

But don't they but photolithography equipment from Applied materials and the like? If so, what kind of patents might they have on photolithography.

Also, around what time did Intel start leading the process race. If it is 1990 or earlier, then the patents would have expired.

[MfA]

Not on the lithography, but on the algorithms used to create pixelated chromeless masks.

Intel always lead, but the lead has increased lately.

[rpg.314]

a) If companies don't look at patents for fear of treble damages, what is preventing others from figuring out the same techniques?

b) If it is just about the technique for creating masks, why are foundry companies like TSMC so much behind on the process itself. Their customer's products might roll off late, but the process should be ready right?

[MfA]

No one is making high performance processors at TSMC though, can't really compare what the IDMs do (lets pretend AMD still is one for a moment) with what the fabless companies do at TSMC.

[Arun]

On 45nm, Intel made the unique decision of going for dry double patterning instead of wet single patterning (the latter being what everyone else is using), which AFAICT is probably both more expensive and at least slightly worse in nearly every way. This was a time-to-market decision, as immersion would not have been ready in time to get 45nm up and running 2 years after 65nm.

I think this is emblematic of Intel's process strategy: when necessary they don't go for the cheapest or the best option, they go for whichever is most likely to work, and they change it on the next process if a better solution is ready by then. It's obviously not the only factor or even necessarily the main one (their process engineers rock and their R&D investment is massive), but I'm convinced it is a substantial factor, and I thought I'd mention it because it is so rarely mentioned.

(on 32nm, I suppose there is the advantage of having experience with both High-K and double patterning, both of which are possibly harder than immersion lithography to get right - just look at AMD delaying their 32nm Fusion APU because of yields - of course, TSMC doesn't have as much of an excuse because their 28LP/LPT process is still SiON and amazingly enough their 28nm doesn't use double patterning, just a slightly improved ASML tool for the critical layers)

[DavidC]

Originally Posted by Arun

On 45nm, Intel made the unique decision of going for dry double patterning instead of wet single patterning (the latter being what everyone else is using), which AFAICT is probably both more expensive and at least slightly worse in nearly every way. This was a time-to-market decision, as immersion would not have been ready in time to get 45nm up and running 2 years after 65nm.

That can't factor in. They were using double patterning since 65nm. Whatever "problems" they might have been having was probably fixed by 45nm.

[Arun]

Originally Posted by DavidC

That can't factor in. They were using double patterning since 65nm. Whatever "problems" they might have been having was probably fixed by 45nm.

I'm not sure I understand, I assume it's a misunderstanding. The risky move for Intel would have been to go for wet/immersion litography on 45nm because the tools would not have been ready in time for them. Using more aggressive double patterning than on 65nm or anyone else on 45/40nm was the *safe route* for them, but based on my understanding of the costs of double patterning and the effect of immersion litography, it was probably both (at least slightly) more expensive and less dense.

Doing double patterning on 65nm, which to my understanding was more specific and not very aggressive and therefore cheaper than what GF/IBM/Samsung are doing on 32/28nm, was a fairly high cost way to slightly improve the process and probably accelerate/simplify yield improvement - exactly the kind of thing you'd expect a company with higher gross margins like Intel to be able to do unlike TSMC. But I don't have any real knowledge of the 65nm double patterning issue, and I don't really understand how expensive what they did must have been compared to other forms of it, so take this paragraph with a truckload of salt and sorry if it's flawed in some way.

[Silent_Buddha]

Aye, the cost isn't going to be a factor if you can beat everyone to a new node by half a year or more. Something Intel's been able to do for a while. That gives you the advantage of staying in the lead and basically recouping all of that extra cost and then some.

Unfortunately, not something you can do if you are in the "catch up" position. At that point you have to be either as cost efficient as possible and/or as performant as possible as you don't have the luxury of dictating margins.

[Simon F]

Originally Posted by MfA

PS. damn, no title editing.

Is that better?