[McElvis]

http://www.anandtech.com/video/showdoc.html?i=1614

That sounds expensive...

[MfA]

The filter down approach sounds like a recipe for failure, I doubt its programmable enough to be dropping in displacement mapping or new higher order surface representations as a firmware update.

[pascal]

Humm,
The VPU use a 256bits DDR memory bus 8)

Where can I preorder it?

[Joe DeFuria]

Yes, assuming the Matrox Parhelia rumors are correct, this is the second 256 bit DDR based architecture that we'll see this year. That, more than anything else actually, has me very excited. As I was hoping, it looks to me that we are indeed on the virge of starting the "256 bit bus" evolution. A step change in available bandwidth is a "good thing", no matter what architecture we're looking at.

Also, (again, assuming the Matrox rumors are true), I am a little bit disappointed that this is the second "new architecture" that will lack full DX9 pixel shader capability. But if raw performance is significantly higher than the GeForce4 ti-4600 (as it should be with 20 GB/sec bandwidth), it should be a good high-end gaming solution.

Looks to me that this 3D Labs product and the Matrox Parhelia are going to try and compete in the exact same market space.

[Joe DeFuria]

Hmmm....

I wonder how long it will be before we can see the next-gen cards benchmarked on Doom III:

http://biz.yahoo.com/prnews/020503/laf018_1.html

What I hate about PRs like this, is it doesn't tell you anything about the release date. Doom III will be "debuted" at E3 this year, but what the hell does that mean in terms of how close it is to being finished?

[arjan de lumens]

Hmmm. 16 scalar FP units (as opposed to, say, 4 vector units) to do the vertex shader job does not sound like a particularly good idea - you get too much latency when doing common operation such as dot-products, reciprocal square roots, exponentiation, etc.

The renderer pipeline programmability? Difficult to judge without looking at the actual instruction set and restrictions like register file size, program size, etc. My initial guess: similar to Radeon 8500, except with support for somewhat longer programs.

4 pipelines sounds a bit low for a design with a 256-bit DDR bus, but then again, if this chip will support >32-bit color and MSAA, as it looks like it will do, it will need every bit of bandwidth it can get. And, given 20 GB/s, probably look quite good.

The total lack of any tessellation/displacement mapping-type features may place the chip at a substantial feature-wise disadvantage relative to Parhelia/R300/NV30, though.

[demalion]

Why couldn't tesselation processing be done via the vertex processing instructions? We don't know what the instructions (EDIT: and addressing limitations) are to know if this is possible or not, correct?

[Qroach]

I can tell you this much about the new Matrox part. it's should compete very well with the GF4 and in some cases beat it out. But these rumored spec on the net are completely false. it's not going to compete with NV30 or anything else released months down the road.

This came from someone that works there. Also, they certainly haven't decide to go tiler or traditional yet.

[mboeller]

IMHO; this comment was really amazing :

Even more of a surprise is the fact that production quality silicon is currently running at 3DLabs and it would be pessimistic to say that the first shipments of this technology won't occur within 2 months.

I thought Nov/Dec. is the date; but now it seems to be August at the latest!

[Joe DeFuria]

I thought Nov/Dec. is the date; but now it seems to be August at the latest!

Well, Nov/Dec is/was the date for the consumer based solution. It's not surprising that the professional versions will be out months earlier. The professional version should be in significantly smaller volumes, which will allow 3D Labs to work out the initial "kinks" with drivers and compatibility, and give the fab more time to ramp-up production to be able to handle the larger demand of the consumer market.

[Dave Baumann]

Originally Posted by mboeller

I thought Nov/Dec. is the date; but now it seems to be August at the latest!

I think its fairly important to take note of this from the first paragraph of Toms preview:

While this architecture is going to find its way initially into the Oxygen line of workstation graphics cards from 3Dlabs, it also heralds some of what we can hope to see coming from Creative Labs this Christmas.

The thing to remember is that the QA process for consumer cards is going to be a lot longer than for the workstation. 3Dlabs are well versed in optimisation for Workstation products, and there are much fewer of them - for consumer boards its likely that 3Dlabs/Creative are starting their dev rel and support from scratch, this could cause some delays to the Creative consumer branded boards.

[Joe DeFuria]

But these rumored spec on the net are completely false. it's not going to compete with NV30 or anything else released months down the road.

So, which "rumored specs" are false? The only "leaked specs" we have are basically these:

256 Bit DDR Bus (up to 20 GB/sec bandwidth)
Does 8X MSAA as fast as Ti-4600 does 2X MSAA
DX8 compliant
Some DX9 features (like displacement mapping.)

As for it "not competing" with NV30...why not? What do we know of featrues, performance, and price of NV30, R-300, etc? It may not be able to compete purley on features (DX9 support), but features is only part of the story.

Also, they certainly haven't decide to go tiler or traditional yet.

What do you mean by that? Who hasn't decided? nVidia or Matrox? Certainly, they have both decided which architecture (deferred or traditional) for this fall's products. Can you explain what you mean?

[merlin]

Extreme Tech's Preview:

http://www.extremetech.com/print_art...a=26271,00.asp

[arjan de lumens]

Originally Posted by demalion

Why couldn't tesselation processing be done via the vertex processing instructions? We don't know what the instructions (EDIT: and addressing limitations) are to know if this is possible or not, correct?

A "vertex processor", by Nvidia/ATI definition, is only able to process data already supplied on a per-vertex basis; it cannot in any way create or destroy vertices. In order to do tessellation of any kind, you need to create new vertices. Lots and lots of them. I would think that if the "vertex processor" of the 3dlabs chip was that powerful/general-purpose, it would not have been called "vertex processor" in the first place. And if the chip did have HOS/displacement mapping functionality, they would almost certainly make a point out of it in the presentation that has been given out.

[jb]

Originally Posted by arjan de lumens

And if the chip did have HOS/displacement mapping functionality, they would almost certainly make a point out of it in the presentation that has been given out.

Taken from the above ExtremeTech link:


Higher Order Surfaces: N-patches, Bezier, B-Splines, NURBS


So it looks like the P10 does support it. Now how well will its n-patchs be compatible with ATI's truform?

[Joe DeFuria]

No displacement mapping mentioned, but from ExtremeTech's preview:

Higher Order Surfaces: N-patches, Bezier, B-Splines, NURBS

On displacement mapping: I've stated my opinion on it in another thread, and it's relevant here:

I don't think displacement mapping will be anything more than a "gimmicky" feature for the next couple years. I see the current implementations displacement mapping as being analogous to "bump-mapping" support back in the DX6 era.

By the time developers start to take displacement mapping seriously, I'm betting we'll be on DX 10/11 hardware, with vastly superior and more general implementations. Until then, I predict we'll only see a smattering of games with limited and "gimmicky" support for displacement mapping in. (Similar to how various forms of bump-mapping were supported in the past, to be soon superceded by more general pixel shaders.)

[Qroach]

Joe,

So, which "rumored specs" are false? The only "leaked specs" we have are basically these:

These are the leaked specs that i'm talking about. They showed up today...

http://www.nvnews.net/forum/showthre...threadid=14216

I don't believe what's written there, do you?

As for it "not competing" with NV30...why not? What do we know of featrues, performance, and price of NV30, R-300, etc? It may not be able to compete purley on features (DX9 support), but features is only part of the story.

Why not? Since I was told was that it's going to compete in features/performance with the Geforce 4. I was told it's roughly the same speed and a little faster in some cases. Unless you think the Geforce 4 would compete nicely in features/performance with NV30 that is? If that's your opinion, all i can say is that I wouldn't agree and leave it at that.

Well joe, since we mainly have rumored feautres/performance of this matrox product to compare against each other, I wasn't talking about price. i wasn't told anything about the price. although they do have a price on this rumor page, and it does compete with the GF4, if you want to believe it that another story...

What do you mean by that? Who hasn't decided? nVidia or Matrox? Certainly, they have both decided which architecture (deferred or traditional) for this fall's products. Can you explain what you mean?

I was talking about matrox. When i inquired about it being a tiler or traditional, the guy I spoke with said they haven't made the decision to go with a full blown tiler or stick with the traditional down the road. He was pretty vague as you can tell, and didn't really answer the question about this product. he said that they (matrox) keep changing their minds (and or direction) and since we have heard rumors of this being a tiler, I thought i'd add that.

[arjan de lumens]

Originally Posted by jb

Taken from the above ExtremeTech link:

Higher Order Surfaces: N-patches, Bezier, B-Splines, NURBS

So it looks like the P10 does support it. Now how well will its n-patchs be compatible with ATI's truform?

Hmm. The same chart says that Geforce4 supports Bezier and B-spline surfaces, which is news to me at least. (AFAIK, early Geforce3 drivers exposed driver-level support for such surfaces, but that was later removed.)

If N-patches are supported by the drivers for this card, I would expect the result to be 100% compatible with the ATI implementation - N-patches aren't that ill-defined.

[Oompa Loompa]

Originally Posted by Joe DeFuria

As I was hoping, it looks to me that we are indeed on the virge of starting the "256 bit bus" evolution.

Nasty Freudian slip, that.

[Gunhead]

Funny, but the inclusion of lots of simple all-purpose processing units reminded me of Fuzion 150. (Albeit it was designed to have 1.5k of them and not much else on board.) Even the transistor counts (76M) match. Wonder if 3DLabs has taken peeks into network processors (NPUs? :P )? Then again, 3DLabs wasn't pimping ImageBR so maybe they don't want an NV1 of their own after all :P

BTW, reading Anand's text, did anyone happen to get the impression that 3D is quite not his strongest area? Would have to bother to read again to give precise quotes, so I won't bother, but it's just too bad it wasn't somebody from B3D making the visit and getting all that data...

[LeStoffer]

Hmmm: transistor count 76M + process technology 0.15 micron + 4 pipe lines = me thinks that this baby won't be a killer in raw fillrate. Sure it'll have the ability to apply 8 textures in a single pass, but I guess that this will mainly be exposed through OpenGL 2.0 (or 3Dlabs GL-extentions that is).

If the GF4 or 8500 were extremely limited by memory bandwidth the consumer part would be awesome, but this is not the case. So I guess the extra bandwidth will be used for FSAA/better image quality - not ultra high FPS. But we'll see for sure 8)

[Joe DeFuria]

Quincy,

These are the leaked specs that i'm talking about. They showed up today...

You need to get out more. That .jpg showed up this past April 1st. They are known to be a hoax.

...Since I was told was that it's going to compete in features/performance with the Geforce 4.

And I've been told its features may compete with GeForce4, but performance would be in another class. So we each have our sources saying different things. Please, don't tell me that "your" sources must be better, because such an argument would be pretty meaningless. You'll have to forgive me if I don't put much faith in your sources if you consider this jpg to be a "credible" rumor, when it's been known for a month to be a hoax.

Again, the "credible" rumors (oxymoron?) about Parhelia is what I mentioned above. They indicate a new class of performance, but not a new class of features.

I was talking about matrox. When i inquired about it being a tiler or traditional, the guy I spoke with said they haven't made the decision to go with a full blown tiler or stick with the traditional down the road.

I'm still not clear on what your trying to say in terms of relevance to Parhelia: Did this contact of yours simply refuse to tell you that Parhelia is a deferred renderer or a "tradtional", or is he saying that Matrox hasn't made up their mind on it yet? If you're talking about products after Parhelia, what's the relevance to our discussion?

[Qroach]

Joe,

You need to get out more. That .jpg showed up this past April 1st. They are known to be a hoax.

i do get out, which is why I hadn't seen it Anyway, I was saying that i didn't believe it a few posts back for the record.

And I've been told its features may compete with GeForce4, but performance would be in another class. So we each have our sources saying different things. Please, don't tell me that "your" sources must be better, because such an argument would be pretty meaningless.

My sources are bigger than yours don't worry, I wasn't going to bother arguing that. It would be a waste of time.

You'll have to forgive me if I don't put much faith in your sources if you consider this jpg to be a "credible" rumor, when it's been known for a month to be a hoax.

Actually i didn't consider this jpg to be credible. That why I said:

"But these rumored spec on the net are completely false"

I'm still not clear on what your trying to say in terms of relevance to Parhelia: Did this contact of yours simply refuse to tell you that Parhelia is a deferred renderer or a "tradtional", or is he saying that Matrox hasn't made up their mind on it yet? If you're talking about products after Parhelia, what's the relevance to our discussion?

He didn't refuse, but he just didn't answer my question directly. He was also on his way out, so i didn't get to ask anything else. I think it's a safe bet that this new product won't be a tiler and will stick with a more traditional design, which is what i was getting at with this comment. if they haven't decided what they are using after this product, kinda makes me think they would stick to something they are familiar with.

[Mintmaster]

Originally Posted by LeStoffer

Hmmm: transistor count 76M + process technology 0.15 micron + 4 pipe lines = me thinks that this baby won't be a killer in raw fillrate. Sure it'll have the ability to apply 8 textures in a single pass, but I guess that this will mainly be exposed through OpenGL 2.0 (or 3Dlabs GL-extentions that is).

If the GF4 or 8500 were extremely limited by memory bandwidth the consumer part would be awesome, but this is not the case. So I guess the extra bandwidth will be used for FSAA/better image quality - not ultra high FPS. But we'll see for sure 8)

The extra bandwidth seems like it would be useful if you wanted to forego all the funky memory architectures that NVidia and ATI are using, like the "crossbar memory controller" and the caches that they have. This could save silicon for the other things they have on the chip. Just a guess though.

[Joe DeFuria]

"But these rumored spec on the net are completely false"

Right, but my point is, (most) everyone already knows that the ".jpg" rumors on the net are completely false. The jpg does NOT represent the "rumored" performance of Parhelia. The "rumored specs" that most people are put some faith in, still show a significant theoretical performance advantage compared to the T-4600.

In short: no one is expecting Parhelia to have specs similar to the .jpg: However, most are still expecting Parhelia to have performance notably higher than Ti-4600.

Of course, one still has to factor price into the equation. I do exect the "high end" Parhelia to significantly outperform the ti-4600. But I also expect it to cost significantly more. It may very well be the case that a Parhelia based product that is targeted at similar price points as the Ti-4600, will have a similar performance.