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#1551 | |||||||
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Member
Join Date: Mar 2010
Posts: 331
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Usually higher density chips cost less and afaik the 2Gbit chips are made on a small process tech as well so they should be cheaper. Clamshell with 8 chips versus 4 chips still requires greater PCB real estate and memory traces/VRM's. Quote:
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#1552 | |
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Senior Member
Join Date: May 2005
Posts: 2,042
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Really? I've never noticed... HD3850 consumed 10W less than similarly sized 7900GTX, 10W more than similarly sized 9600GT and 5W less than X1950PRO. All these ~200mm˛ GPUs consumed almost the same amount of power.
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Sorry for my English. But I hope it's better than your Czech |
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#1553 |
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Senior Member
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R600's logic core (ALUs, TMUs, ROPs, etc.) wasn't that big in size -- the stacked padding at the perimeter for the 512-bit interface and the fat ring-bus occuped rather large die area, than normal.
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Apple: China -- Brutal leadership done right.
Google: United States -- Somewhat democratic. Microsoft: Russia -- Big and bloated. Linux: EU -- Diverse and broke. |
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#1554 | |
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Member
Join Date: Aug 2010
Posts: 269
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Let's furthermore assume that the "old" 5D arrangement as used in Cypress provided shader utilization avaraging somehere around 50% of it's full/peak potential in games (which seems rather reasonable comparing peak FLOPs performance to real-world gaming benchmarks between Cypress' 5D and Fermi's 1D arrangement), then you get: 1600 (total shader count) * 0.5 (real-world utilization) = 800 (average used shader count) In order for Barts to achieve an average shader performance about 30% better than Cypress (800*1.3=1040), the new shader arrangement would have to provide an average shader utilization of about 80% (1040/1028=0.8125). Provided that the rest of the new architecture could meet that speculative increase in shader-efficiency, a 1280SP Barts could very well be 30% faster than Cypress in most games. A 1920SP Cayman @ 28nm (allowing for higher clocks?) would probably put it some 60% over Barts when (speculatively) released in Summer 2011. So the real question is: Assuming that the current codenames still refer to the "originally planned" architecture @ 32nm, couldn't it be possible that AMD just decided to "bloat" the 32nm high-midrange Barts into a 40nm chip with some agressive clock tweaks (hence the need of a high-performance 10-layer-PCB) - and make it the "new", "half-step" 68xx series? And couldn't it be possible that the original 32nm high-end Cayman (being to big to be "bloated" to the 40nm process) was acordingly scheduled for a 28nm shrink, making it 2011's new, "full step" 7870 with a 60% performance gain over 40nm Barts? |
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#1555 |
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yes, i'm drunk
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I'm quite positive that all of the "SI-NI-something" series will be 40nm, excluding possibly the lowest end which might be used as "testdrive chips" for 28nm.
I think you're also underestimating the shader utilization of Cypress (and other 4+1D Radeons), at least I remember hearing about 70-80%+ utilization in games
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I'm nothing but a shattered soul... Been ravaged by the chaotic beauty... Ruined by the unreal temptations... I was betrayed by my own beliefs... |
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#1556 |
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Member
Join Date: Mar 2007
Location: Italy
Posts: 362
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384bit? AMD would go down that route just if they planned a huge increase in performance from Cypress. If the increase is just 30%, there is no real point in 240 gb/s of bandwidth.
But, well in that case, we would have a 480 Stream Core (4D), 120 TMUs, 384bit MC and probably 48 ROPs, arranged in 3 SIMD..or maybe even "tri-core" (lol since this time we haven't heard anything on multicore rumors, it may be the right time But that' s definately quite a leap forward, and would require a huge die at 40nm.. around 480 mm^2. Charlie said it's around 380 mm^2, and nApoleon said it's still under 200 watt of TDP. So 384bit must be a fake rumor. IMHO, considering the philosophy AMD /ATi engineers used to build their chips, i wouldn't be surprise to see, as few pages back was said, a big increase in the TMU:ALU ratio. |
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#1557 | |
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Member
Join Date: Aug 2010
Posts: 269
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I'll admit that I'm just an "interested layman" in terms of GPUs - so my "speculation" is set on a rather low level of actual technical insight. Nevertheless, not being an expert often helps thinking "outside the box" - as you arguably can't think in terms boxes you don't really know I just read that Cypress' peak shader performance is roughly about two times that of Fermi's (GF100) - nevertheless, GF100 seems to (at least narrowly) beat RV870 in most shader-heavy benchmarks. I'm not the right guy to factor in the impact of some of the "surrounding" architectural differences in that respect, but I'd assume that most of that discrepancy in theoretical peak performance vs. actual gaming performance is due the difference in shader utilization when comparing Cypress' "1+4D" vs. Fermi's "1D" arrangement? |
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#1558 |
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Senior Member
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Cayman could still maintain 32 ROP configuration, whilst being 384-bit device. We have already seen that AMD's architecture doesn't explicitly hardwire ROP partitions to memory channels. If AMD decides to double the depth-buffer sampling rate, the extra bandwidth would come in handy, and moreover -- HPC applications would benefit from more installable memory base (due to wider bus) and BW of course, given the intentions of AMD to be more completive with NV's Tesla line in this market (are they?).
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Apple: China -- Brutal leadership done right.
Google: United States -- Somewhat democratic. Microsoft: Russia -- Big and bloated. Linux: EU -- Diverse and broke. |
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#1559 | |
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Senior Member
Join Date: Oct 2002
Posts: 2,464
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There's just a whole bunch of differences which make Fermi reach higher performance compared to peak capability (but not per die area). Among other, higher internal cache bandwidth, 32 vs 64 wavefront size, higher tri throughput (certainly much higher with tesselation if app uses that, also better small tri handling in general it seems), higher z fillrate (though color fillrate otoh is a joke compared to Evergreen). It also seems to be more efficient in bandwidth utilization though the reasons for that are unclear (better buffer compression / hierarchical-z / caches?). |
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#1560 |
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Senior Member
Join Date: May 2005
Posts: 2,042
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I believe this was possible only on R5xx and R6xx (maybe it was related to ring bus). There wasn't any R7xx or R8xx part which used such a combination It think ROPs are hardwired to MC since R7xx.
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Sorry for my English. But I hope it's better than your Czech |
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#1561 |
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Junior Member
Join Date: Jan 2010
Posts: 26
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Btw any info about UVD 3?
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#1562 |
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Senior Member
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I think 3D BR has been mentioned.
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#1563 |
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Senior Member
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...and 4K video acceleration. Some minor bug/feature fixes.
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Apple: China -- Brutal leadership done right.
Google: United States -- Somewhat democratic. Microsoft: Russia -- Big and bloated. Linux: EU -- Diverse and broke. |
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#1564 |
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Member
Join Date: Jul 2010
Location: Land of Mu
Posts: 350
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Some more info here: http://pclab.pl/news43091.html, from "a little unofficial talk with an AMD worker". You can try to google translate it, but I don't think it will work well. It's also written rather vaguely, so I complied the main points for you:
- improved Cypress architecture, all GPU blocks improved (so shaders too?) - better performance clock for clock, less power consumption. - The experience in the 40nm process allows for better organization of the die (and save space - that's what I personaly wondered if possible) - Better yields allow for more complicated structures - new UVD 3.0 decoder, with full video playback acceleration for Eyefinity, up to 6 monitors. Overall better decoder. - no problems with samples of chips and cards, not even with the 6970. - prototypes might be send to AMD partners in the coming weeks - AMD wants HD6970 on the market before Xmas (obviously!) - No worries from competetion, they believe Radeons will reign in DX11 generation - Aggressive pricing planned, as long as enough cards can be produced. (buy one asap before prices go up! - First low-end, then middle, then HD6970. - HD6800 planed for beginning of 2011, could be earlier though. - no comment on the rumour AMD would be doing a fusion processor for next Xbox. - lots of optimizm in the AMD camp That's all. FWIW applies here and as many grains of salt you need. |
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#1565 | |
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Member
Join Date: Jun 2008
Location: Torquay, UK
Posts: 945
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Thanks! Luckily I don't need translator for that article EDIT: So according to their 'source' HD6970 launch before HD6870! Also HD68xx series only next year... Maybe they really are goind to produce it on 28nm or HD6970 will be based on Barts core. Last edited by Lightman; 01-Sep-2010 at 19:24. |
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#1566 |
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Senior Member
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28nm is not due until H2'11, so I guess AMD wants to bin more Caymans for the dual-GPU first, to the detriment of 6800 series?!
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Apple: China -- Brutal leadership done right.
Google: United States -- Somewhat democratic. Microsoft: Russia -- Big and bloated. Linux: EU -- Diverse and broke. |
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#1567 |
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yes, i'm drunk
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Huh? Both GF and TSMC are IIRC starting 28nm bulk (the high performance, fit for gfx chips) risk production in Q4 this year, mass production Q1 next year
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I'm nothing but a shattered soul... Been ravaged by the chaotic beauty... Ruined by the unreal temptations... I was betrayed by my own beliefs... |
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#1568 |
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Senior Member
Join Date: Jun 2003
Posts: 2,571
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Then again it took TSMC over a year of "mass production" to actually get out the of the risk production stage with 40nm.
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Aaron Spink speaking for myself inc. |
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#1569 | |
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Junior Member
Join Date: May 2008
Posts: 16
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#1570 |
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Senior Member
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#1571 |
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Unknown.
Join Date: Aug 2002
Location: UK
Posts: 4,883
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I think you'd be crazy to expect end-products until late Q2 even in a best case scenario. Needless to say, neither NVIDIA nor AMD is really expecting to use 28nm designs to compete for 2011 Back-to-School OEM sockets.
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Focusing on non-graphics projects in 2013 (but I still love triangles) "[...]; the kind of variation which ensues depending in most cases in a far higher degree on the nature or constitution of the being, than on the nature of the changed conditions." |
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#1572 | |
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Member
Join Date: Jun 2008
Posts: 409
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Coool! So these darn "Crowd Run" and "Ducks take off" UHD Video files can finally playback with more than 3fps?
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Now, that "no worries from competition", points to the wrong direction! Uh oh! |
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#1573 |
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Senior Member
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If you have a decently clocked Core i7 (~3800MHz), the 2160p sample of the ducks would playback rather smoothly, using properly threaded software decoder (libavcodec for instance).
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Apple: China -- Brutal leadership done right.
Google: United States -- Somewhat democratic. Microsoft: Russia -- Big and bloated. Linux: EU -- Diverse and broke. |
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#1574 |
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MSI Man
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HD6000 gets GPU-Z support:
http://www.techpowerup.com/130141/Te..._Giveaway.html
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I miss you CJ, 1976 - 2010 |
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#1575 | |
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Member
Join Date: Dec 2009
Posts: 600
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http://news.ati-forum.de/index.php/n...mit-rebranding
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