[neliz]

Didn't Fellix say he'd show us MSAA sample patterns or SSAA options?

[dizietsma]

That AF is nice but as others have said we have moved on a long way since the bad old days when certain companies cards had very bad AF. Even AA to me got to the point I couldn't tell the difference without 4x magnifying shots. It's all about the frame rate stupid! Well, at least to me. I'm no sophisticate though.

I wasn't impressed with the ATi numbers against the 285 shown a while ago until someone pointed out to me it was the 5850 and not the 5870 I assumed it was. Looking good.

Is it still October for when it is in the shops or late September? I've lost track or when the release day is estimated.

[LordEC911]

Originally Posted by neliz

Didn't Fellix say he'd show us MSAA sample patterns or SSAA options?

Nothing about type, just AA patterns.

Originally Posted by fellix

The shot is a first hand test result, I can assure you.

Probably I could get some AA-pattern samples, but I'm not promising.

Originally Posted by dizietsma

Is it still October for when it is in the shops or late September? I've lost track or when the release day is estimated.

Current rumors suggest a limited availability at launch, late Sept, NDA supposedly ends on the 22/23(?), with full availability in mid-late Oct.

[no-X]

Originally Posted by LordEC911

Nothing about type, just AA patterns.

Anyway, AA pattern for SS is RG. That's important. It could came a few years earlier, but it's good to see it anyway. As I remember, the last GPU supporting this feature (without need uf multi-GPU platform) was VSA-100 almost 10 years ago

[Ailuros]

Originally Posted by no-X

Anyway, AA pattern for SS is RG. That's important. It could came a few years earlier, but it's good to see it anyway. As I remember, the last GPU supporting this feature (without need uf multi-GPU platform) was VSA-100 almost 10 years ago

That should be correct; if I haven't understood though anything wrong it's not the usual way to achieve RGSS and sure hope it won't affect performance too much. Or to exagerrate a bit I hope anyone wouldn't expect that you can actually use FSAA with 6 monitors in 76xx

[no-X]

Anyway, I feel, that ATi has taken all the "holy grails" and put them into the chip - RGSS (remember, how many people praised it when 3Dfx has gone and many of these people still miss it), AF without angle dependence (I remember intense discussions about this feature in R520 time and the excitement when S3 enabled this feature in new drivers), eyefinity/surround-view - the most praised feature of Matrox Parhelia, exclusive for 7 years, if anybody bought Parhelia for gaming, surround-view was the reason. Dual rasteriser / 32ROPs - two sections, which weren't improved for many years (in terms of quantity, of course), etc...

[aaronspink]

Originally Posted by Kaotik

Furmark doesn't really count, does it?
If it did, both GTX295 and HD4870X2 would be without PCI Express stickers on them

IIRC, they also blew the envelope on one of the 3dmarks as well....

And really, how hard do you think it is to get a sticker?

[Pressure]

Originally Posted by aaronspink

Maybe or maybe not, but we know that it consumes more than 286 watts(4870x2).

...

In other words, take non-measured values of power requirements for graphics cards with an ocean worth of salt. The card is likely to be able to exceed the vendors "TDP" without overclocking fairly easily. One day, they might actually match the specs they advertise.

Of course, there are situations where any given electronic device exceeds their Thermal Design Power but not continually. The same applies to Intel and AMD for example.

[aaronspink]

Originally Posted by Pressure

Of course, there are situations where any given electronic device exceeds their Thermal Design Power but not continually. The same applies to Intel and AMD for example.

CPUs from both at this point, AFAIK, will not exceed TDP for a thermally relevant period. In fact the future as laid out by Intel via their turbo mode technology, is to maximize performance at the TDP level as much as possible via boosting frequencies when possible to ride right at the TDP.

In the case of both 3dmark and furmark, both Nvidia and ATI gpus will operate at beyond TDP for thermally relevant periods of time to the point of device failure.

Both AMD and Intel learned their lessons when Tom's et al did the hot plate articles. Eventually, it would be nice to know that GPUs were smart enough not to become fire hazards as well.

[DeF]

Sorry guys, i couldn't resist
Hitler gets informed about the rumored ATI Evergreen prices

[Pressure]

Originally Posted by DeF

Sorry guys, i couldn't resist
Hitler gets informed about the rumored ATI Evergreen prices

Quite annoying when you actually understand german...

Not to mention the prices seem fair. The Radeon HD 5850 competes with the Geforce GTX 285, yet is cheaper. The same applies to the Radeon HD 5870 compared to the Radeon HD 4870X2 and Geforce GTX 295.

Besides it is a far cry away from the $599 and $649 NVIDIA have asked for in the past.

[Ailuros]

It's not the first time I've seen this video being used. It's not funny anymore and I don't see anything wrong with the initial MSRPs either.

[Jawed]

Originally Posted by 3dilettante

The RBE-specific caches are local to each RBE, so if there are two per memory controller, the controller sees two separate chunks of data being sent out.

Look at RV740. It has 2 RBEs per MC. It has 81% of the bandwidth of HD4850 yet comes in at ~93% of the performance. So clearly the dual-RBE per MC configuration is not hurting.

Under load conditions with each RBE contending equally, a naive arrangement might interleave traffic from each RBE with the other, which would hurt utilization of the memory bus if the targets are far enough apart in memory.
I suppose a single RBE could for some reason interleave from multiple batches, though I'm not sure it would want to.

There's no alternative. There are 10 clusters in RV770 feeding only 4 RBEs, of course the RBEs are going to be quickly switching amongst tiles. "Quickly" is relative of course, the fastest a switch can occur is once every 16 cycles, assuming a tile is 64 pixels. 16 cycles is enough time for about 722 bytes of data (assuming 850MHz core clock and 153.6GB/s in Cypress). Or if you prefer, in 16 cycles the MC does about 22.5 transactions.

Now I will admit that the way screen space is tiled for rasterisation isn't necessarily the same tiling for memory controllers.

Ways to limit the abuse of the MC would be to either make sure there is much greater locality between RBEs--that is that they work on neighboring tiles at the same time; make it so that an RBE has a monopoly on an MC for some number of bus transactions; or expand the MC's ability to recombine traffic.

R700 introduced MCs that only support local RBEs (1 in RV770, RV730, RV710 and 2 in RV740). After that, I don't know of any information on how tiling of screen space or memory works. I suppose if one wrote one's own driver, one could explore this in detail...

The regularity of the transactions and their locality can influence the amount of utilized bandwidth.
Jumping around and closing/reopening DRAM pages or otherwise not providing the linear accesses DRAM really likes can cut down the amount of time available for actual transactions.
The factors for this would be in the opaque realm of AMD's mapping policies, memory controller parameters, and GDDR5's architectural restrictions.

At the same time as RBEs are pumping out pixels the TUs are consuming piles of texels. There's also a constant stream of vertex data. So there's a limit to the kindness that can be shown to DRAM.

This is an admirable goal.

Eh? It's a prime directive since ATI first introduced early-Z rejection, along with compression. Bandwidth efficiency has shown huge gains over the last 5 years, but it's clearly expensive in terms of transistor count or we'd have had these gains already.

Given how much of the design appears to be "MOAR UNITZ", I am curious to see what they tried. The GPU peaks at 190W and it has a 60% increase in performance with a doubling of almost everything, so maybe they haven't tried too much.

Well, that's exactly my problem. Doubling the RBEs per MC has clearly (as can already be seen in RV740) brought a significant jump in efficiency, but at the same time the GDDR5 gravy train appears to have hit the buffers. So unless something radical happens and GDDR5 goes way above 6Gbps, the future is looking awful for this architecture - the entire forward-rendering concept needs a rethink.

One "advantage" of this scheme would be that it requires minimal investment in changing the rasterizers.
Rather than sending rasterization data back and forth, the GPU can get lazy and just rely on broadcasting from the RBE-level Z buffer to both Hierarchical Z blocks, and rely on the RBEs to automatically discard whatever excess fragments make it past the even more conservative than usual early Hierarchical Z checks.

It's just a question of the latency of RBE-Z updates for hierarchical-Z - if those latencies are long enough, does hierarchical-Z work? That latency could easily be thousands of cycles. Tens of thousands.

I'm not saying I'd find this to be the best solution, but it is a solution that involves a certain "economy of effort".

A simulation would be pretty informative, if done in enough detail - there have been various attempts at simulating MCs in GPUs but I suppose only the IHVs can really do this.

I'm unclear if the motivation for the dual-rasterisers was simply to cope with the high density of primitives produced by tessellation.

One way of looking at this multiple-rasteriser architecture is to imagine what happens if AMD is going to build a multi-chip solution where the multiple-rasterisers scale-up and work by communicating amongst themselves (i.e. non-AFR, instead something like super-tiled). If this is the basis of the design, then off-chip inter-rasteriser latencies are obviously far higher than on-chip - let's say 500 cycles for the sake of argument. Where does that lead? Dumb round-robin rasterisation? Still doesn't answer the question of how to apportion the vertex streams across multiple GPUs, or what to do with GS stream out from multiple GPUs (let alone append/consume buffers).

I dunno, is it even worth thinking in those terms...

Jawed

[psolord]

Originally Posted by DeF

Sorry guys, i couldn't resist
Hitler gets informed about the rumored ATI Evergreen prices

Lol wth? This is my video! I never thought it would reach this thread!

Originally Posted by Pressure

Quite annoying when you actually understand german...

Not to mention the prices seem fair. The Radeon HD 5850 competes with the Geforce GTX 285, yet is cheaper. The same applies to the Radeon HD 5870 compared to the Radeon HD 4870X2 and Geforce GTX 295.

Besides it is a far cry away from the $599 and $649 NVIDIA have asked for in the past.

I guess you are right! Unfortunately it is one of those videos that will annoy some people. Sorry about that. I didn't mean any disrespect towards anybody. I've seen the movie and it's awesome!

Although i have discussed the prices with our forum members, this video was actually a balance means to this one!
http://www.youtube.com/watch?v=FR45j...e=channel_page

Again , sorry! You may want to turn the audio down!

[DeF]

Originally Posted by Pressure

Quite annoying when you actually understand german...

Not to mention the prices seem fair. The Radeon HD 5850 competes with the Geforce GTX 285, yet is cheaper. The same applies to the Radeon HD 5870 compared to the Radeon HD 4870X2 and Geforce GTX 295.

Besides it is a far cry away from the $599 and $649 NVIDIA have asked for in the past.

Its not that i consider evergreen prices to be unfair. Quite the opposite. And i agree with what u have said above. Its just i found this video very hilarious

[wishiknew]

psolord I watched your other evergreen video with the Hitler as Jensen. Was hoping to see mentions of him selling NVDA stock or lousy yields. Oh well.

[psolord]

Originally Posted by wishiknew

psolord I watched your other evergreen video with the Hitler as Jensen. Was hoping to see mentions of him selling NVDA stock or lousy yields. Oh well.

I wasn't aware of those when i was molesting the subtitles!

I heard about the yields just today (CJ) and about the stock selling just yesterday!

[Kaotik]

Originally Posted by aaronspink

IIRC, they also blew the envelope on one of the 3dmarks as well....

And really, how hard do you think it is to get a sticker?

In 3DMark06 1600x1200 4xAA/16xAF, which xbitlabs still finds the best program to test power consumption on, at leas HD4870X2 stays well under the TDP, at 264W

Sticker was a figure of speech, they wouldn't get validated by PCI SIG

[trinibwoy]

Don't cry, it's a crappy game anyway

[Pressure]

So do we got anymore yummy leaks?

[CJ]

Originally Posted by Pressure

So do we got anymore yummy leaks?

Yes, CCC temperature screenshots were just leaked on my home forum. Shows GPU being downclocked to 157Mhz core and memory to 300Mhz in 2D. Wasn't expecting these shots though. Was waiting for someone to leak the Supersampling option in CCC. :P

[Alexko]

Originally Posted by CJ

Yes, CCC temperature screenshots were just leaked on my home forum. Shows GPU being downclocked to 157Mhz core and memory to 300Mhz in 2D. Wasn't expecting these shots though. Was waiting for someone to leak the Supersampling option in CCC. :P

Wow, 75°C at full load and 30% fan speed, that's quite an improvement from RV770/790.

[Bouncing Zabaglione Bros.]

Does anyone know when UK availability (ie available to purchase) will start? Will there be stock to buy in the UK on the 22nd Sept?

[digitalwanderer]

Sometime shortly after launch.

[Jawed]

Originally Posted by elsence

I just thought that since the memory capacity is doubling every 2 years and the resolution is changing with a much slower tempo
(In the future we will see..., but i don't think bezeliousfinity lol will change anything for the vast majority of the market)
don't you think that it makes sense the game engines to use the extra memory capacity (that their customer base has) over each cycle per resolution target?

Oh definitely, I simply hadn't noticed that 512MB really is too little on a significant number of games at resolutions such as 1680.

I think that AMD made a very good decision with the 256bit controller (if you think what are the positives and what are the potential negatives of a 512bit controller for ATI, definetely a good business decision...)

I suspect this GPU is way larger than would have been preferred (compare with RV770 and RV670) as 40nm is expensive. Maybe AMD will have a way to squeeze a 512-bit MC (or equivalent-bandwidth alternative) into this size some time.

Maybe the theory goes that under D3D11 developers will be able to create renderers that don't soak up so much bandwidth, while improving visuals and being faster. But that's not going to happen any time soon and it doesn't help the existing games that are still strangled (even if it can be argued they were programmed badly and/or unable-to-scale.

And performance scaling is still required to get people to upgrade.

I perceive the AMD slides regarding GDDR5 differently.

What do you perceive? I'm getting other feedback that beyond 5Gbps is troublesome.

Larrabee from what i can understand is not going to be competitive from a performance standpoint with the future high end GPUs that ATI & NV can make, but it doesn't have to be.

It probably won't be, on 45nm, but on 32nm?... While 28/32nm GPUs will be strangled by GDDR5 that might be 20-30% faster than now.

Intel to control the GPU market has to stay in the market at least 2 engines mini cycles (2+2 years) and must use such a pricing model, business tactics and a marketing strategy so to entice partners and consumers to their solutions...

Despite reason, i am not optimistic that Intel will achieve this, that's why my original plan when i heard about Larrabee's GPU was that Intel will implement a custom GPU socket solution lol and develop their strategy with this direction...

Seems unlikely. Between putting a GPU on the CPU die and a discrete board, a socket-only solution seems like unnecessary expense.

If you read a JPR report 1-1,5 month back, JP was talking that nearly half of the new PCs in 2012 will be sold with multi AIBs GPU solutions (scaling will be done with Lucid Tech chip solutions according to him) (lol).

I hope his prediction to be wrong.

I don't see how AMD/NV will like this direction...

I think that ATI & NV have the technical capability to make homogeneous multi-core designs like SGX543MP (I am not talking about the tile based rendering method...)
(that's how i see the progression of the ATI/NV future shared memory GPU designs)
so they will not need Lucid for perf. scaling (why NV/ATI to lose all the money that customers are going to pay for Lucid based solutions when this money can go directly to NV/ATI?)

These fixed-function GPUs are trying to unwind from the huge fixed-function trench they've dug into. Compute shader/OpenCL goes some way and should see significant usage in games, and in theory alleviate some of these harsh bandwidth issues. But it seems to me that basic forward rendering is too simplistic a pipeline model now, with the party thrown by the bandwidth gods coming to an end (just like the MHz party came to an end for CPUs years ago).

I was really hoping that the major compute shader features of D3D11 would result in some serious re-configuration of the GPU. Maybe NVidia will take this problem more seriously with GT300 (though, to be honest, based on Dally's comments I'm doubtful).

Jawed