[DegustatoR]

Originally Posted by leoneazzurro

Seems a little too big for a "around 1 Billion transistors" chip.
I'd bet for 192 SP and regarding the 32 ROPS... they seem a little too much, either.
But if it's a 1.5 Billion transistors, it may be.

10 SP clusters is a given and you can't have 192 SPs in 10 clusters.
So it's either 240 (24 SPs per cluster) or 160 (16 SPs per cluster).
Although i agree that "around 1 bln transistors" is a bit small for such chip.

[leoneazzurro]

Originally Posted by AnarchX

GT-200 is supposed to be around 600mm^2, so it should be of course over 1 billion transistors.

I mean: "around 1 Billion" is different from "around 1.5 billions". And with the rumored (but unconfirmed) 600 mm^2 at 65 nm it would be closer to 1.5 than 1.0 Billion transistors. At 55 nm it would be more than 1.5 Billion transistors.

"Around 1 Billion transistors" IMHO copes better with a 192 "SP" variant than with a 240 "SP" one.

[leoneazzurro]

Originally Posted by DegustatoR

10 SP clusters is a given and you can't have 192 SPs in 10 clusters.
So it's either 240 (24 SPs per cluster) or 160 (16 SPs per cluster).
Although i agree that "around 1 bln transistors" is a bit small for such chip.

Sorry, I'm missing the official news where GT200 it is said to have 10 clusters.

Aside from jokes, I was not really commenting the russian site rumor itself, I was merely referring to the supposed number of transistors for GT 200 related to the "SP" and ROPs numbers and gave my opinion about what I expect the GT200 will be.
To expect to have 2x the hardware resources of G92 (except for texturing, which should be "merely" 25% more), with 33% only more transistors (giving moreover a die size of 430 mm^2@65 nm or 310mm^2 @ 55nm instead of the rumored 600) seems a little out of reality: Happy to be wrong, however

[Mart]

Originally Posted by pjbliverpool

1100Mhz GDDR3 (2200Mhz effective) gives 140.8GB/s on a 512bit bus.

Thats quite a bit higher than the Ultra with only 103.7GB/s.

Oops, for some reason I thought it would be 2100MHz effective

Still, 9800GTX has half that bandwidth, and seems to be limited on that front (The 9600GT, with only half the SPs, performs really well compared with it)
Wouldn't it be a mistake if NVIDIA were to (nearly) double the amount of ALUs (240), creating a huge chip that would in the end be limited by its bandwidth? Wouldn't that be a waste of die space?
If so, perhaps the 160 SP rumour has more credibility. Or perhaps the shader clocks could be significantly lower, for better thermal and power characteristics.

[AnarchX]

ALUs are normally not limited by BW.

Another point:
16 ROPs -> 32 ROPs
256-Bit -> 512-Bit
...

[nAo]

Originally Posted by AnarchX

ALUs are normally not limited by BW.

I know at least a couple of GPU architectures that disagree with this statement.

[ShaidarHaran]

Originally Posted by nAo

I know at least a couple of GPU architectures that disagree with this statement.

anything recent though?

[nAo]

Originally Posted by ShaidarHaran

anything recent though?

yep

[ShaidarHaran]

Originally Posted by nAo

yep

such as...

[nAo]

Originally Posted by ShaidarHaran

such as...

I don't want to make nda ninjas cry

[ShaidarHaran]

Originally Posted by nAo

I don't want to make nda ninjas cry

Oh, ok. So RV770 or GT200 then. Hmmm.......

[Voltron]

Originally Posted by jimmyjames123

He also said they were working things that were miles ahead of the competition. Surely he must have meant being able to use CUDA to run those many parallel processors for good use in computational finance, medicine, weather, etc?

Though clearly the underpinnings of CUDA are very, very important to NVIDIA and I basically agree with your thoughts, it is unlikely that he was just referring to just this since the process of designing and bringing these things to the market is so complex. But obviously they have some interesting stuff going on to exploit their processors in the future.

One thing that I am curious about is CUDA and their internal design and architecture tools. These tools have always been a key part of NVIDIA's success, but it seems like it is only a matter of time before they can harness heterogeneous computing to make some big efficiency gains here.

[AlStrong]

Originally Posted by nAo

I know at least a couple of GPU architectures that disagree with this statement.

RSX Secret?

[AnarchX]

Originally Posted by nAo

I know at least a couple of GPU architectures that disagree with this statement.

Sure, there could be some special cases, which I included with "normally".
But I do not think 240 MADD+MUL SPs could be limited by ~100GB/s, since in high arithmetical throughput scenarios most data should be stay in the GPU.

[trinibwoy]

Yeah I'm not seeing how GT200 will be equally or more bandwidth limited than G92. Assuming a 512-bit bus and 80 TMU's bandwidth doubles while texturing capability only increases by 25%.

However, you can probably make a case for the TMU's in G92 being bottlenecked by the shader array. In which case a significant increase in ALU capacity could increase demand for bandwidth indirectly by increasing TMU utilization.

[jimmyjames123]

Originally Posted by Voltron

Though clearly the underpinnings of CUDA are very, very important to NVIDIA and I basically agree with your thoughts, it is unlikely that he was just referring to just this since the process of designing and bringing these things to the market is so complex. But obviously they have some interesting stuff going on to exploit their processors in the future.

One thing that I am curious about is CUDA and their internal design and architecture tools. These tools have always been a key part of NVIDIA's success, but it seems like it is only a matter of time before they can harness heterogeneous computing to make some big efficiency gains here.

Well said. And speaking of heterogeneous computing, I really like the fact that NVIDIA is clearly spelling out the fact that most PC systems today are very unbalanced in their CPU and GPU. Spending less money on CPU and more money on GPU gives a much much much better bang for the buck in most scenarios related to visual computing (ie. gaming, high def video, etc). It's amazing that only now is one of the big players in the computer/graphics industry speaking up about it: http://www.nvidia.com/object/balancedpc.html

[H]OCP has been on to this trend for a long time, and I think the success story of the Gateway laptop (the one that sold out at Best Buy within two weeks) with slower CPU and faster GPU has provided some vindication for them. I hope that Dell and HP are taking notice too.

[Megadrive1988]

Why wouldn't GT200 use GDDR4 or GDDR5 ?

[jimmyjames123]

Maybe because cost of GDDR3 is still substantially lower? If NV can have as good or better performance with GDDR3 than their competition with GDDR4/5, then I can understand why they would want to use it. With lower cost memory modules and still class-leading performance, then they can increase their pricing margins.

[Megadrive1988]

Or maybe GDDR3 could be used in the midrange 9900 GT product while the highend 9900 GTX and 9900 GX2 get GDDR4.

I could understand the use of GDDR3 in all the upcoming high-end products if GDDR4 was the bleeding edge of memory but it's not, GDDR5 is what's new. That's why I was surprised to not see GDDR4 in use.

[trinibwoy]

I don't think GDDR4 has any advantages over GDDR3 at this point. They're both just as fast and GDDR3 is probably cheaper and more widely available. I haven't seen any evidence of lower power consumption from GDDR4 either.

[DSC]

http://www.dailytech.com/NVIDIA+AMD+...ticle11451.htm

Original NVIDIA roadmaps put the GT200 launch in late Fall 2008. However internal memos sent out to board partners in early March detail that the GT200 processor has already been taped out. The same document alludes to the fact that the GT200 chip is very stable, and has been ready to ship for reference designs for several weeks already.

Channel partners indicate that the 9800 GTX and GX2 will begin phasing out next month in preparation for the GT200 launch. Both companies have made promises to show demonstrations of their next-gen cards at the Computex Taipei trade show on June 3, 2008.

[Rangers]

Originally Posted by DSC

http://www.dailytech.com/NVIDIA+AMD+...ticle11451.htm

So it took something like a stroke of luck (unexpectedly stable early versions)to even get this new Nvidia chip almost two years after the last one.

Kind of scary, really. What would we be looking at if things hadn't gone well?

Guess this proves the idea Nvidia was just waiting around for AMD to do something is wrong as well..

[jimmyjames123]

According to Jen Hsun on financial analyst day, the tools and methods and simulations in use today by NVIDIA are so good that when a chip tapes out, he just "knows" that it is going to work properly.

[FUDie]

Originally Posted by jimmyjames123

According to Jen Hsun on financial analyst day, the tools and methods and simulations in use today by NVIDIA are so good that when a chip tapes out, he just "knows" that it is going to work properly.

Good grief, enough with the cheerleading already. What do you expect "JHH" to say? You think he's going to say, "Our next chips are gonna suck."?

-FUDie

[jimmyjames123]

Cheerleading? LOL, don't be a hater, I'm just reporting back on what was actually said during the analyst day (which you obviously didn't bother to listen to). The times of waiting months and months to fix something that is broken with a chip after tape out are clearly going to be a thing of the past as simulation tools get better and better. Duh.